MCIMX503CVK8B Freescale Semiconductor, MCIMX503CVK8B Datasheet - Page 4

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MCIMX503CVK8B

Manufacturer Part Number
MCIMX503CVK8B
Description
Processors - Application Specialized CODEX 13MM REV 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX503CVK8B

Core
ARM Cortex A8
Processor Series
i.MX50
Data Bus Width
32 bit
Operating Supply Voltage
0.75 V to 1.275 V
Memory Type
L1/L2 Cache, ROM, SRAM

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Part Number
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Quantity
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Part Number:
MCIMX503CVK8BR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Introduction
The memory system consists of the following components:
The i.MX50 introduces a next generation system bus fabric architecture that aggregates various
sub-system buses and masters for access to system peripherals and memories. The various bus-systems
and components are as follows:
4
Level 1 cache:
— Instruction (32 Kbyte)
— Data (32 Kbyte)
Level 2 cache:
— Unified instruction and data (256 Kbyte)
Level 2 (internal) memory:
— Boot ROM, including HAB (96 Kbyte)
— Internal multimedia/shared, fast access RAM (128 Kbyte)
External memory interfaces:
— 16/32-bit DDR2-533, LPDDR2-533, or LPDDR1-400 up to a total of 2 GByte
— 8-bit NAND SLC/MLC Flash with up to 100 MHz synchronous clock rate and up to 32-bit
— 16/32-bit NOR Flash with a dedicated 16-bit muxed-mode interface. I/O muxing logic selects
— 16-bit PSRAM, Cellular RAM
— Managed NAND, including eMMC up to rev 4.4
64-bit AXI Fabric (266 MHz)—This bus-fabric is the SoC’s central bus aggregation point.
— Provides access to all slave targets in the SoC:
— Provides arbitration to the following masters in the system:
hardware ECC for 1 Kbyte block size
EIMv2 port as primary muxing at system boot.
– ROM (ROMCP)
– On-chip RAM (OCRAM)
– External DRAM (DRAM MC)
– External static RAM (EIM)
– Interrupt controller (TZIC)
– Decode into the AHB MAX crossbar second level AHB fabric.
– ARM CPU complex
– Pixel processing pipeline (ePXP)
– Electrophoretic display controller (EPDC)
– eLCDIF LCD display controller
– DCP Crypto engine
– BCH ECC engine
– MAX AHB crossbar
– GPU 2D
– SDMA
i.MX50 Applications Processors for Consumer Products, Rev. 4
Freescale Semiconductor

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