IS42S16100E-7TL ISSI, Integrated Silicon Solution Inc, IS42S16100E-7TL Datasheet - Page 15

• Manufacturer Part Number: IS42S16100E-7TL
• Description: IC SDRAM 16MBIT 143MHZ 50TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S16100E-7TL

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 16M (1M x 16)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 50-TSOPII
• Organization: 1Mx16
• Density: 16Mb
• Address Bus: 12b
• Access Time (max): 6/5.5ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 130mA
• Pin Count: 50
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 706-1071; IS42S16100E-7TL

IS42S16100E, IC42S16100E
OPERATION COMMAND TABLE
Current State Command
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
01/22/08
Idle
Row Active
Read
Write
Read With
Auto-
Precharge
DESL
NOP
BST
READ / READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
Operation
No Operation or Power-Down
No Operation or Power-Down
No Operation or Power-Down
Illegal
Illegal
Row Active
No Operation
Auto-Refresh or Self-Refresh
Mode Register Set
No Operation
No Operation
No Operation
Read Start
Write Start
Illegal
Precharge
Illegal
Illegal
Burst Read Continues, Row Active When Done
Burst Read Continues, Row Active When Done
Burst Interrupted, Row Active After Interrupt
Burst Interrupted, Read Restart After Interrupt
Burst Interrupted Write Start After Interrupt
Illegal
Burst Read Interrupted, Precharge After Interrupt
Illegal
Illegal
Burst Write Continues, Write Recovery When Done
Burst Write Continues, Write Recovery When Done
Burst Write Interrupted, Row Active After Interrupt
Burst Write Interrupted, Read Start After Interrupt
Burst Write Interrupted, Write Restart After Interrupt
Illegal
Burst Write Interrupted, Precharge After Interrupt
Illegal
Illegal
Burst Read Continues, Precharge When Done
Burst Read Continues, Precharge When Done
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
(10)
(10)
(10)
(10)
(10)
(1,2)
(15)
(17)
(17)
(13)
(12)
(12)
(11,16)
(16)
(11,16)
(16)
CS RAS CAS WE A11 A10 A9-A0
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
X
H
X
H
H
X
H
X
H
X
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
X
H
H
H
X
H
H
H
H
X
H
H
H
X
H
H
H
X
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
OP CODE
OP CODE
OP CODE
OP CODE
OP CODE
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
15