C8051F572-IMR Silicon Labs, C8051F572-IMR Datasheet - Page 186
C8051F572-IMR
Manufacturer Part Number
C8051F572-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F556-IMR.pdf
(302 pages)
Specifications of C8051F572-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F55x/56x/57x
SFR Definition 19.21. P2MDIN: Port 2 Input Mode
SFR Address = 0xF3; SFR Page = 0x0F
SFR Definition 19.22. P2MDOUT: Port 2 Output Mode
SFR Address = 0xA6; SFR Page = 0x0F
186
Note: P2.2-P2.7 are available on 40-pin and 32-pin packages.
Note: P2.2-P2.7 are available on 40-pin and 32-pin packages.
Name
Reset
Name
Reset
7:0
7:0 P2MDOUT[7:0] Output Configuration Bits for P2.7–P2.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
P2MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P2.7–P2.0 (respectively).
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P2MDOUT register.
0: Corresponding P2.n pin is configured for analog mode.
1: Corresponding P2.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.1
P2MDOUT[7:0]
4
1
4
0
P2MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0
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