C8051F572-IMR Silicon Labs, C8051F572-IMR Datasheet - Page 215
C8051F572-IMR
Manufacturer Part Number
C8051F572-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F556-IMR.pdf
(302 pages)
Specifications of C8051F572-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 215 of 302
- Download datasheet (2Mb)
SFR Definition 21.1. CAN0CFG: CAN Clock Configuration
SFR Address = 0x92; SFR Page = 0x0C
Name
Reset
Bit
7:2
1:0 SYSDIV[1:0] CAN System Clock Divider Bits.
Type
Bit
Unused
Name
Unused
R
7
0
Read = 000000b; Write = Don’t Care.
The CAN controller clock is derived from the CIP-51 system clock. The CAN control-
ler clock must be less than or equal to 25 MHz.
00: CAN controller clock = System Clock/1.
01: CAN controller clock = System Clock/2.
10: CAN controller clock = System Clock/4.
11: CAN controller clock = System Clock/8.
Unused
R
6
0
Unused
R
5
0
Unused
Rev. 1.1
R
4
0
Function
Unused
R
3
0
C8051F55x/56x/57x
Unused
R
2
0
1
0
SYSDIV[1:0]
R/W
0
0
215
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