S9S08DZ60F2MLF Freescale Semiconductor, S9S08DZ60F2MLF Datasheet - Page 101

• Manufacturer Part Number: S9S08DZ60F2MLF
• Description: 8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
• Manufacturer: Freescale Semiconductor

Specifications of S9S08DZ60F2MLF

• Rohs: yes
• Core: HCS08
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 60 KB
• Data Ram Size: 4 K
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• Processor Series: MC9S08DZ60

6.5.4
Port D is controlled by the registers listed below.
6.5.4.1
6.5.4.2
Freescale Semiconductor
PTDDD[7:0]
PTDD[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTDDD7
PTDD7
Port D Registers
Port D Data Register Bits — For port D pins that are inputs, reads return the logic level on the pin. For port D
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port D pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTDD to all 0s, but these 0s are not driven out the corresponding pins because reset also
configures all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
Data Direction for Port D Bits — These read/write bits control the direction of port D pins and what is read for
PTDD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port D bit n and PTDD reads return the contents of PTDDn.
Port D Data Register (PTDD)
0
Port D Data Direction Register (PTDDD)
0
7
7
PTDDD6
PTDD6
0
0
6
6
Figure 6-25. Port D Data Direction Register (PTDDD)
Table 6-23. PTDDD Register Field Descriptions
Table 6-22. PTDD Register Field Descriptions
Figure 6-24. Port D Data Register (PTDD)
PTDDD5
MC9S08DZ60 Series Data Sheet, Rev. 4
PTDD5
0
0
5
5
PTDDD4
PTDD4
0
0
4
4
Description
Description
PTDDD3
PTDD3
3
0
3
0
PTDDD2
PTDD2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTDDD1
PTDD1
0
0
1
1
PTDDD0
PTDD0
0
0
0
0
101