S9S08DZ60F2MLF Freescale Semiconductor, S9S08DZ60F2MLF Datasheet - Page 353

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S9S08DZ60F2MLF

Manufacturer Part Number
S9S08DZ60F2MLF
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08DZ60F2MLF

Rohs
yes
Core
HCS08
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Processor Series
MC9S08DZ60

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0
Figure 17-4
asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge on
BKGD to the start of the bit time as perceived by the target MCU. The host initiates the bit time but the
target HCS08 finishes it. Because the target wants the host to receive a logic 0, it drives the BKGD pin low
for 13 BDC clock cycles, then briefly drives it high to speed up the rising edge. The host samples the bit
level about 10 cycles after starting the bit time.
Freescale Semiconductor
SPEED-UP PULSE
PERCEIVED START
TO BKGD PIN
TARGET MCU
(TARGET MCU)
HOST DRIVE
DRIVE AND
BDC CLOCK
OF BIT TIME
BKGD PIN
shows the host receiving a logic 0 from the target HCS08 MCU. Because the host is
Figure 17-4. BDM Target-to-Host Serial Bit Timing (Logic 0)
MC9S08DZ60 Series Data Sheet, Rev. 4
10 CYCLES
HOST SAMPLES BKGD PIN
10 CYCLES
HIGH-IMPEDANCE
SPEEDUP
PULSE
Chapter 17 Development Support
EARLIEST START
OF NEXT BIT
353

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