S9S08DZ60F2MLF Freescale Semiconductor, S9S08DZ60F2MLF Datasheet - Page 331
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S9S08DZ60F2MLF
Manufacturer Part Number
S9S08DZ60F2MLF
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S08DZ60F2MLH.pdf
(416 pages)
Specifications of S9S08DZ60F2MLF
Rohs
yes
Core
HCS08
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Processor Series
MC9S08DZ60
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Quantity:
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When BDM is active, the coherency mechanism is frozen (unless reset by writing to TPMxSC register)
such that the buffer latches remain in the state they were in when the BDM became active, even if one or
both halves of the modulo register are written while BDM is active. Any write to the modulo registers
bypasses the buffer latches and directly writes to the modulo register while BDM is active.
Reset the TPM counter before writing to the TPM modulo registers to avoid confusion about when the first
counter overflow will occur.
16.3.4
TPMxCnSC contains the channel-interrupt-status flag and control bits used to configure the interrupt
enable, channel configuration, and pin function.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
CHnF
Bit 15
Bit 7
TPM Channel n Status and Control Register (TPMxCnSC)
0
0
0
0
7
7
7
Figure 16-12. TPM Channel n Status and Control Register (TPMxCnSC)
= Unimplemented or Reserved
Figure 16-10. TPM Counter Modulo Register High (TPMxMODH)
Figure 16-11. TPM Counter Modulo Register Low (TPMxMODL)
CHnIE
14
0
6
0
0
6
6
6
MSnB
MC9S08DZ60 Series Data Sheet, Rev. 4
13
5
0
5
5
0
5
0
MSnA
12
0
4
0
0
4
4
4
ELSnB
11
0
3
0
0
3
3
3
Chapter 16 Timer/PWM Module (S08TPMV3)
ELSnA
10
0
2
0
0
2
2
2
1
9
0
1
1
0
1
0
0
Bit 8
Bit 0
0
0
0
0
0
0
0
331
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