GT28F320C3TA110 Intel, GT28F320C3TA110 Datasheet - Page 45

• Manufacturer Part Number: GT28F320C3TA110
• Description: IC FLASH 32MBIT 110NS 47MBGA
• Manufacturer: Intel

Specifications of GT28F320C3TA110

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: Advanced + Boot Block FLASH
• Memory Size: 32M (2M x 16)
• Speed: 110ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 47-MBGA
• Other names: 820978

Datasheet
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
NOTES:
1. Write pulse width (t
2. Refer to
3. Sampled, but not 100% tested.
4. See
5. See
6. V
#
goes high first). Hence, t
WE# going high (whichever goes high first) to CE# or WE# going low (whichever goes low last). Hence,
t
slew rate.
Table 19. Write Operations—32 Mbit Density
WPH
CC
t
t
t
t
t
/
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Max = 3.3 V for 32-Mbit 0.25 Micron product.
PHWL
PHEL
ELWL
WLEL
WLWH
ELEH
DVWH
DVEH
AVWH
AVEH
WHEH
EHWH
WHDX
EHDX
WHAX
EHAX
WHWL /
EHEL
VPWH
VPEH
QVVL
BHWH
BHEH
QVBL
WHGL
Figure 11, “AC Input/Output Reference Waveform” on page 49
Figure 9, “Write Operations Waveform” on page
Sym
= t
WHWL
Table 7, “Command Bus Operations” on page 24
/
/
/
/
/
/
/
/
/
RP# High Recovery to WE# (CE#)
Going Low
CE# (WE#) Setup to WE# (CE#)
Going Low
WE# (CE#) Pulse Width
Data Setup to WE# (CE#) Going High
Address Setup to WE# (CE#) Going
High
CE# (WE#) Hold Time from WE#
(CE#) High
Data Hold Time from WE# (CE#)
High
Address Hold Time from WE# (CE#)
High
WE# (CE#) Pulse Width High
V
V
WP# Setup to WE# (CE#) Going
High
WP# Hold from Valid SRD
WE# High to OE# Going Low
= t
PP
PP
EHEL
Hold from Valid SRD
Setup to WE# (CE#) Going High
Parameter
WP
) is defined from CE# or WE# going low (whichever goes low last) to CE# or WE# going high (whichever
= t
WP
WHEL
= t
= t
WLWH
EHWL
= t
.
V
ELEH
CC
= t
Product
Density
3.0 V – 3.6 V
2.7 V – 3.6 V
WLEH
= t
47.
Note
1,4,5
2,4,5
2,4,5
2,4,5
2,4,5
1,4,5
3,4,5
4,5
4,5
4,5
3,4
3,4
3,4
3,4
ELWH
for valid A
6
Intel
. Similarly, write pulse width high (t
70 ns
Min
150
200
70
45
40
50
25
30
0
0
0
0
0
0
0
£
for timing measurements and maximum allowable input
IN
Advanced+ Boot Block Flash Memory (C3)
or D
90 ns
Min
150
200
90
60
40
60
30
30
IN
0
0
0
0
0
0
0
.
Min
150
200
90
60
50
60
30
30
0
0
0
0
0
0
0
32 Mbit
100 ns
100
Min
150
200
70
60
70
30
30
0
0
0
0
0
0
0
WPH
) is defined from CE# or
Min
100
150
200
70
60
70
30
30
0
0
0
0
0
0
0
110 ns
Min
110
150
200
70
60
70
30
30
0
0
0
0
0
0
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
45