GT28F320C3TA110 Intel, GT28F320C3TA110 Datasheet - Page 8

IC FLASH 32MBIT 110NS 47MBGA

GT28F320C3TA110

Manufacturer Part Number
GT28F320C3TA110
Description
IC FLASH 32MBIT 110NS 47MBGA
Manufacturer
Intel
Datasheets

Specifications of GT28F320C3TA110

Rohs Status
RoHS non-compliant
Format - Memory
FLASH
Memory Type
Advanced + Boot Block FLASH
Memory Size
32M (2M x 16)
Speed
110ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
47-MBGA
Other names
820978

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
GT28F320C3TA110
Manufacturer:
Intel
Quantity:
10 000
Intel
2.0
2.1
2.2
8
£
Advanced+ Boot Block Flash Memory (C3)
Device Description
This section provides an overview of the Intel
features, packaging, signal naming, and device architecture.
Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities
with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data
storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of
the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.
The device supports read-array mode operations at various I/O voltages (1.8 V and 3 V) and erase
and program operations at 3 V or 12 V VPP. With the 3 V I/O option, VCC and VPP can be tied
together for a simple, ultra-low-power design. In addition to I/O voltage flexibility, the dedicated
VPP input provides complete data protection when V
The device features a 128-bit protection register enabling security techniques and data protection
schemes through a combination of factory-programmed and user-programmable OTP data
registers. Zero-latency locking/unlocking on any memory block provides instant and complete
protection for critical system code and data. Additional block lock-down capability provides
hardware protection where software commands alone cannot change the block’s protection status.
A command User Interface(CUI) serves as the interface between the system processor and internal
operation of the device. A valid command sequence issued to the CUI initiates device automation.
An internal Write State Machine (WSM) automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit configuration operations.
The device offers three low-power saving features: Automatic Power Savings (APS), standby
mode, and deep power-down mode. The device automatically enters APS mode following read
cycle completion. Standby mode begins when the system deselects the flash memory by
deasserting CE#. The deep power-down mode begins when RP# is asserted, which deselects the
memory and places the outputs in a high-impedance state, producing ultra-low power savings.
Combined, these three power-savings features significantly enhanced power consumption
flexibility.
Ballout Diagram
The C3 device is available in 48-lead TSOP, 48-ball VF BGA, 48-ball BGA, and Easy BGA
packages. (Refer to
respectively.)
Figure 1 on page
9,
Figure 3 on page
®
Advanced+ Boot Block Flash Memory (C3) device
PP
11, and
V
PPLK
.
Figure 4 on page
12,
Datasheet

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