ATXMEGA64A3-MU Atmel, ATXMEGA64A3-MU Datasheet - Page 27

• Manufacturer Part Number: ATXMEGA64A3-MU
• Description: 8-bit Microcontrollers - MCU 8/16 bit 1.6V-3.6V 64KB + 4KB
• Manufacturer: Atmel

Specifications of ATXMEGA64A3-MU

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: AVR
• Data Bus Width: 8 bit/16 bit
• Maximum Clock Frequency: 32 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Package / Case: QFN EP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 2 KB
• Interface Type: I2C, SPI, USART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 50
• Number Of Timers: 7
• Processor Series: ATXMega
• Program Memory Type: Flash
• Factory Pack Quantity: 260
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.6 V

15. I/O Ports
15.1
15.2
15.3
8068T–AVR–12/10
Features
Overview
I/O configuration
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The XMEGA A3 devices have flexible General Purpose I/O Ports. A port consists of up to 8 pins,
ranging from pin 0 to pin 7. The ports implement several functions, including synchronous/asyn-
chronous input sensing, pin change interrupts and configurable output settings. All functions are
individual per pin, but several pins may be configured in a single operation.
All port pins (Pn) have programmable output configuration. In addition, all port pins have an
inverted I/O function. For an input, this means inverting the signal between the port pin and the
pin register. For an output, this means inverting the output signal between the port register and
the port pin. The inverted I/O function can be used also when the pin is used for alternate
functions.
Selectable input and output configuration for each pin individually
Flexible pin configuration through dedicated Pin Configuration Register
Synchronous and/or asynchronous input sensing with port interrupts and events
Asynchronous wake-up from all input sensing configurations
Two port interrupts with flexible pin masking
Highly configurable output driver and pull settings:
Configuration of multiple pins in a single operation
Read-Modify-Write (RMW) support
Toggle/clear/set registers for Output and Direction registers
Clock output on port pin
Event Channel 0 output on port pin 7
Mapping of port registers (virtual ports) into bit accessible I/O memory space
– Sense both edges
– Sense rising edges
– Sense falling edges
– Sense low level
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Totem-pole
Pull-up/-down
Wired-AND
Wired-OR
Bus-keeper
Inverted I/O
XMEGA A3
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