ATXMEGA64A3-MU Atmel, ATXMEGA64A3-MU Datasheet - Page 40
ATXMEGA64A3-MU
Manufacturer Part Number
ATXMEGA64A3-MU
Description
8-bit Microcontrollers - MCU 8/16 bit 1.6V-3.6V 64KB + 4KB
Manufacturer
Atmel
Datasheet
1.ATXMEGA64A3-MU.pdf
(134 pages)
Specifications of ATXMEGA64A3-MU
Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
AVR
Data Bus Width
8 bit/16 bit
Maximum Clock Frequency
32 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Package / Case
QFN EP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
2 KB
Interface Type
I2C, SPI, USART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
50
Number Of Timers
7
Processor Series
ATXMega
Program Memory Type
Flash
Factory Pack Quantity
260
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.6 V
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24. Crypto Engine
24.1
24.2
8068T–AVR–12/10
Features
Overview
•
•
•
•
The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two com-
monly used encryption standards. These are supported through an AES peripheral module and
a DES CPU instruction. All communication interfaces and the CPU can optionally use AES and
DES encrypted communication and data storage.
DES is supported by a DES instruction in the AVR XMEGA CPU. The 8-byte key and 8-byte
data blocks must be loaded into the Register file, and then DES must be executed 16 times to
encrypt/decrypt the data block.
The AES Crypto Module encrypts and decrypts 128-bit data blocks with the use of a 128-bit key.
The key and data must be loaded into the key and state memory in the module before encryp-
tion/decryption is started. It takes 375 peripheral clock cycles before the encryption/decryption is
done and decrypted/encrypted data can be read out, and an optional interrupt can be generated.
The AES Crypto Module also has DMA support with transfer triggers when encryption/decryp-
tion is done and optional auto-start of encryption/decryption when the state memory is fully
loaded.
Data Encryption Standard (DES) CPU instruction
Advanced Encryption Standard (AES) Crypto module
DES Instruction
AES Crypto Module
– Encryption and Decryption
– Single-cycle DES instruction
– Encryption/Decryption in 16 clock cycles per 8-byte block
– Encryption and Decryption
– Support 128-bit keys
– Support XOR data load mode to the State memory for Cipher Block Chaining
– Encryption/Decryption in 375 clock cycles per 16-byte block
XMEGA A3
40
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