C8051F131R Silicon Labs, C8051F131R Datasheet - Page 139

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

While in the ADC2 ISR, a PCA interrupt occurs. Recall the PCA interrupt is configured as a high priority
interrupt, while the ADC2 interrupt is configured as a low priority interrupt. Thus, the CIP-51 will now vector
to the high priority PCA ISR. Upon doing so, the CIP-51 will automatically place the SFR page needed to
access the PCA’s special function registers into the SFRPAGE register, SFR Page 0x00. The value that
was in the SFRPAGE register before the PCA interrupt (SFR Page 2 for ADC2) is pushed down the stack
into SFRNEXT. Likewise, the value that was in the SFRNEXT register before the PCA interrupt (in this
case SFR Page 0x0F for Port 5) is pushed down to the SFRLAST register, the “bottom” of the stack. Note
that a value stored in SFRLAST (via a previous software write to the SFRLAST register) will be overwritten.
See Figure 11.7 below.
Figure 11.6. SFR Page Stack After ADC2 Window Comparator Interrupt Occurs
SFRPAGE
SFRNEXT
pushed to
SFRPAGE on ADC2
pushed on stack in
SFR Page 0x02
(ADC2)
(Port 5)
Automatically
0x0F
0x02
interrupt
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFRPAGE
SFRNEXT
SFRLAST
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