ISPPAC-POWR1208-01T44E Lattice, ISPPAC-POWR1208-01T44E Datasheet - Page 2

• Manufacturer Part Number: ISPPAC-POWR1208-01T44E
• Description: Supervisory Circuits PROGRAMMABLE PWR SUPPLY CONTR
• Manufacturer: Lattice

Specifications of ISPPAC-POWR1208-01T44E

• Number Of Voltages Monitored: 12
• Monitored Voltage: Adjustable
• Undervoltage Threshold: 1.03 V
• Overvoltage Threshold: 5.72 V
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 800
• Supply Current (typ): 15000 uA
• Supply Voltage - Min: 2.25 V

Lattice Semiconductor
Power Supply Sequence Controller and Monitor
The ispPAC-POWR1208 device is specifically designed as a fully-programmable power supply sequencing control-
ler and monitor for managing up to eight separate power supplies, as well as monitoring up to 12 analog inputs or
supplies. The ispPAC-POWR1208 device contains an internal PLD that is programmable by the user to implement
digital logic functions and control state machines. The internal PLD connects to four programmable timers, special
purpose I/O and the programmable monitoring circuit blocks. The internal PLD and timers can be clocked by either
an internal programmable clock oscillator or an external clock source.
The voltage monitors are arranged as 12 independent comparators each with 192 programmable trip point set-
tings. Monitoring levels are set around the following standard voltages: 1.2V, 1.5V, 1.8V, 2.5V, 3.3V or 5.0V.
All 12 voltages can be monitored simultaneously (i.e., continuous-time operation). Other non-standard voltage lev-
els can be accounted for using various scale factors.
For added robustness, the comparators feature a variable hysteresis that scales with the voltage they monitor.
Generally, a larger hysteresis is better. However, as power supply voltages get smaller, that hysteresis increasingly
affects trip-point accuracy. Therefore, the hysteresis is +/-16mV for 5V supplies and scales down to +/-3mV for 1.2V
supplies, or about 0.3% of the trip point.
The programmable logic functions consist of a block of 36 inputs with 81 product terms and 16 macrocells. The
architecture supports the sharing of product terms to enhance the overall usability.
Output pins are configurable in two different modes. There are eight outputs for controlling eight different power
supplies. OUT5-OUT8 are open-drain outputs for interfacing to other circuits. The HVOUT1-HVOUT4 pins can be
programmed individually as open-drain outputs or as high voltage FET gate drivers. As high voltage FET gate
driver outputs, they can be used to drive an external N-Channel MOSFET as a switch to control the voltage ramp-
up of the target board. The four HVOUT drivers have programmable current and voltage levels. Of the eight out-
puts, four can be configured in the FET gate driver mode or open-drain digital mode.
Figure 1. ispPAC-POWR1208 Block Diagram
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
VMON7
VMON8
VMON9
VMON10
VMON11
VMON12
RESET
IN1
IN2
IN3
IN4
Analog
Digital
Inputs
Inputs
5
12
36 I/P & 16
Controller
Sequence
4 Timers
Macrocell
Internal
250kHz
8
CPLD
GLB
OSC
CLKIO
2
4
4
ispPAC-POWR1208
High Voltage
Comparator
Outputs
Outputs
Outputs
ispPAC-POWR1208 Data Sheet
Logic
COMP1
COMP2
COMP3
COMP4
COMP5
COMP6
COMP7
COMP8
VDD
HVOUT1
HVOUT2
HVOUT3
HVOUT4
OUT5
OUT6
OUT7
OUT8