AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 37

IC FLASH 32MBIT 100MHZ 8SOIC

AT25DF321A-SH-B

Manufacturer Part Number
AT25DF321A-SH-B
Description
IC FLASH 32MBIT 100MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25DF321A-SH-B

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (16384 pages x 256 Bytes)
Speed
100MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Memory Configuration
16384 Pages X 256 Bytes
Interface Type
Serial, SPI
Clock Frequency
100MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3686D–DFLASH–12/09
12.2
Table 12-2.
Data Type
Manufacturer ID
Device ID (Part 1)
Device ID (Part 2)
Read Manufacturer and Device ID
Identification information can be read from the device to enable systems to electronically query and identify the device
while it is in system. The identification method and the command opcode comply with the JEDEC standard for
“Manufacturer and Device ID Read Methodology for SPI Compatible Serial Interface Memory Devices”. The type of
information that can be read from the device includes the JEDEC defined Manufacturer ID, the vendor specific Device ID,
and the vendor specific Extended Device Information.
The Read Manufacturer and Device ID command is limited to a maximum clock frequency of f
are capable of operating at very high clock frequencies, applications should be designed to read the identification
information from the devices at a reasonably low clock frequency to ensure that all devices to be used in the application
can be identified properly. Once the identification process is complete, the application can then increase the clock
frequency to accommodate specific Flash devices that are capable of operating at the higher clock frequencies.
To read the identification information, the CS pin must first be asserted and the opcode of 9Fh must be clocked into the
device. After the opcode has been clocked in, the device will begin outputting the identification data on the SO pin during
the subsequent clock cycles. The first byte that will be output will be the Manufacturer ID followed by two bytes of Device
ID information. The fourth byte output will be the Extended Device Information String Length, which will be 00h indicating
that no Extended Device Information follows. After the Extended Device Information String Length byte is output, the SO
pin will go into a high-impedance state; therefore, additional clock cycles will have no affect on the SO pin and no data will
be output. As indicated in the JEDEC standard, reading the Extended Device Information String Length and any
subsequent data is optional.
Deasserting the CS pin will terminate the Manufacturer and Device ID read operation and put the SO pin into a high-
impedance state. The CS pin can be deasserted at any time and does not require that a full byte of data be read.
Table 12-1.
Manufacturer and Device ID Details
Byte No.
1
2
3
4
Bit 7
0
0
0
Manufacturer and Device ID Information
Family Code
Sub Code
Bit 6
0
1
0
Data Type
Manufacturer ID
Device ID (Part 1)
Device ID (Part 2)
Extended Device Information String Length
Bit 5
0
0
0
JEDEC Assigned Code
Bit 4
1
0
0
Bit 3
Product Version Code
1
0
0
Density Code
Bit 2
1
1
0
Bit 1
1
1
0
Bit 0
1
1
1
Value
Hex
1Fh
47h
01h
Details
JEDEC Code: 0001 1111 (1Fh for Atmel)
Family Code: 010 (AT25DF/26DFxxx series)
Density Code: 00111 (32-Mbit)
Sub Code:
Product Version:00001 (First major revision)
CLK
Atmel AT25DF321A
000 (Standard series)
. Since not all Flash devices
Value
47h
01h
00h
1Fh
37

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