CY7C1041DV33-10ZSXIT Cypress Semiconductor Corp, CY7C1041DV33-10ZSXIT Datasheet - Page 7

• Manufacturer Part Number: CY7C1041DV33-10ZSXIT
• Description: IC SRAM 4MBIT 10NS 44TSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C1041DV33-10ZSXIT

• Memory Size: 4M (256K x 16)
• Package / Case: 44-TSOP II
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 10 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 90 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 3.3 V
• Memory Configuration: 256K X 16
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +85°C
• Density: 4Mb
• Access Time (max): 10ns
• Sync/async: Asynchronous
• Architecture: SDR
• Clock Freq (max): Not Required
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Operating Temp Range: -40C to 85C
• Supply Current: 90mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 256Kword
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Data Retention Characteristics
Over the Operating Range
Data Retention Waveform
Switching Waveforms
Document Number: 38-05473 Rev. *I
V
I
t
t
Notes
CCDR
CDR
R
16. No input may exceed V
17. Automotive product information is preliminary.
18. Tested initially and after any design or process changes that may affect these parameters.
19. Full device operation requires linear V
20. Device is continuously selected. OE, CE, BHE, and BLE = V
21. WE is HIGH for read cycle.
Parameter
DR
[19]
DATA OUT
[18]
ADDRESS
V
CE
CC
V
Data retention current
Chip deselect to data retention time
Operation recovery time
CC
for data retention
CC
+ 0.3 V.
PREVIOUS DATA VALID
Description
CC
ramp from V
t
CDR
t
3.0 V
OHA
DR
to V
Figure 4. Read Cycle No. 1
IL
CC(min.)
.
t
AA
V
V
CC
IN
> 50 μs or stable at V
> V
= V
DATA RETENTION MODE
CC
DR
– 0.3 V or V
= 2.0 V, CE > V
V
DR
t
RC
> 2 V
Conditions
CC(min.)
[20, 21]
IN
> 50 μs.
< 0.3 V
CC
– 0.3 V,
[16]
Auto-A
Auto-E
Industrial
3.0 V
DATA VALID
t
R
[17]
[17]
CY7C1041DV33
Min
2.0
t
RC
–
–
–
0
Max
10
10
15
–
–
–
Page 7 of 17
Unit
mA
mA
mA
ns
ns
V
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