CY7C1041DV33-10ZSXIT Cypress Semiconductor Corp, CY7C1041DV33-10ZSXIT Datasheet - Page 9

IC SRAM 4MBIT 10NS 44TSOP

CY7C1041DV33-10ZSXIT

Manufacturer Part Number
CY7C1041DV33-10ZSXIT
Description
IC SRAM 4MBIT 10NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr

Specifications of CY7C1041DV33-10ZSXIT

Memory Size
4M (256K x 16)
Package / Case
44-TSOP II
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
10ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
10 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
90 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
3.3 V
Memory Configuration
256K X 16
Supply Voltage Range
3V To 3.6V
Memory Case Style
TSOP
No. Of Pins
44
Operating Temperature Range
-40°C To +85°C
Density
4Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
SDR
Clock Freq (max)
Not Required
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Operating Temp Range
-40C to 85C
Supply Current
90mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256Kword
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1041DV33-10ZSXIT
Manufacturer:
CYPRESS
Quantity:
2 000
Part Number:
CY7C1041DV33-10ZSXIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Waveforms
Document Number: 38-05473 Rev. *I
Notes
26. Data I/O is high impedance if OE or BHE and BLE = V
27. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
28. During this period the I/Os are in the output state and input signals should not be applied.
ADDRESS
BHE, BLE
DATA I/O
BHE, BLE
DATAI/O
ADDRESS
CE
WE
OE
WE
CE
NOTE
28
Figure 8. Write Cycle No. 3 (WE Controlled, OE HIGH During Write)
(continued)
t
SA
t
t
SA
HZOE
Figure 7. Write Cycle No. 2 (BLE or BHE Controlled)
IH.
t
AW
t
AW
t
SCE
t
t
WC
WC
DATA
t
t
PWE
SD
t
t
BW
t
PWE
SCE
IN
VALID
t
SD
t
HD
t
HA
[26, 27]
t
HD
t
HA
CY7C1041DV33
Page 9 of 17
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