IDT71T75702S85PFG IDT, Integrated Device Technology Inc, IDT71T75702S85PFG Datasheet - Page 14

• Manufacturer Part Number: IDT71T75702S85PFG
• Description: IC SRAM 18MBIT 85NS 100TQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT71T75702S85PFG

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous ZBT
• Memory Size: 18M (512K x 36)
• Speed: 85ns
• Interface: Parallel
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 71T75702S85PFG

NOTE:
1. The LBO, TMS, TDI, TCK and TRST pins will be internally pulled to V
NOTES:
1. All values are maximum guaranteed values.
2. At f = f
3. For I/Os V
(Typical, ns)
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs
Symbol
S ym b ol
V
V
|I
t
|I
|I
I
I
I
CD
LO
I
S B 2
S B 3
S B 1
I
OL
OH
LI
LI
DD
ZZ
|
|
|
MAX,
Figure 2. Lumped Capacitive Load, Typical Derating
HD
6
5
4
3
2
1
inputs are cycling at the maximum frequency of read cycles of 1/t
= V
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
O p e rating P o we r
S up p ly Cu rre nt
CM O S S tand b y P o we r
S up p ly Cu rre nt
Clo c k Running P o we r
S up p ly Cu rre nt
Id le P o we r
S up p ly Cu rre nt
Fu ll S le e p M o d e
S up p ly Cu rre nt
DDQ
20 30 50
, JTAG and ZZ Input Leakage Current
– 0.2V, V
I/O
P aram eter
LD
Capacitance (pF)
= 0.2V. For other inputs V
80
Figure 1. AC Test Load
Parameter
100
Z
0
= 50
De v ic e S e le c te d , O utp uts O p e n,
De v ic e De s e le c te d , O utp uts O p e n ,
De v ic e De s e le c te d , O utp uts O p e n ,
De v ic e S e le c te d , O utp uts O p e n,
De v ic e S e le c te d , O utp uts O p e n,
A DV /
V
V
f = 0
V
f = f
V
V
IN
DD
DD
IN
IN
> V
> V
> V
MA X
= M a x ., V
(2,3)
= M a x ., V
> V
< V
IH
(2,3)
HD
HD
HD
50
= X, V
IH
IH
o r < V
(1)
= V
, V
, V
o r < V
o r < V
5319 drw 05
V
DD
Test Co nd itio ns
DD
DD
200
IN
IN
DDQ
DD
5319 drw 04
– 0.2V, V
IL
= M ax ., ZZ > V
= M ax .,
> V
> V
LD
LD
, f = f
= M ax .,
, f = f
, f = f
DD
/2
HD
HD
and the ZZ pin will be internally pulled to V
,
MA X
I
I
V
V
V
o r < V
o r < V
OL
OH
LD
MA X
MA X
DD
DD
OUT
,
= 0.2V.
6.42
(2)
= +6mA, V
= -6mA, V
(2,3)
(2,3)
= Max., V
= Max., V
CYC
14
= 0V to V
LD
LD
; f=0 means no input lines are changing.
HD
,
,
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
DD
DD
IN
IN
CC
Test Conditions
= 0V to V
= 0V to V
= Min.
= Min.
Co m 'l
275
105
40
60
40
Commercial and Industrial Temperature Ranges
DD
DD
7.5n s
295
125
Ind
60
80
60
SS
if they are not actively driven in the application.
Co m 'l
250
100
40
60
40
8ns
270
120
Ind
60
80
60
Min.
2.0
___
___
___
___
Co m 'l
225
40
95
60
40
8.5n s
0 to 2.5V
Figure 1
(V
(V
Max.
0.4
30
___
2ns
DDQ/2
DDQ/2
5
5
245
115
Ind
60
80
60
)
)
5319 tbl 21
5319 tb l 2 2
5319 tbl 23
Unit
Unit
µA
µA
µA
m A
m A
m A
m A
m A
V
V