IDT71T75702S85PFG IDT, Integrated Device Technology Inc, IDT71T75702S85PFG Datasheet - Page 15

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IDT71T75702S85PFG

Manufacturer Part Number
IDT71T75702S85PFG
Description
IC SRAM 18MBIT 85NS 100TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT71T75702S85PFG

Format - Memory
RAM
Memory Type
SRAM - Synchronous ZBT
Memory Size
18M (512K x 36)
Speed
85ns
Interface
Parallel
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
71T75702S85PFG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT71T75702S85PFG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT71T75702S85PFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT71T75702S85PFGI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. Measured as HIGH above 0.6V
2. Transition is measured ±200mV from steady-state.
3. These parameters are guaranteed with the AC load (Figure 1) by device characterization. They are not production tested.
4. To avoid bus contention, the output buffers are designed such that t
Output Parameters
Set Up Times
Hold Times
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CYC
CH
CL
CD
CDC
CLZ
CHZ
OE
OLZ
OHZ
SE
SA
SD
SW
SADV
SC
SB
HE
HA
HD
HW
HADV
HC
HB
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs
Symbol
(1)
(1)
The specs as shown do not imply bus contention because t
which is a Max. parameter (worse case at 70 deg. C, 2.375V).
(2,3,4)
(2,3)
(2,3,4)
(2,3)
Clock Cycle Time
Clock High Pulse Width
Clock Low Pulse Width
Clock High to Valid Data
Clock High to Data Change
Clock High to Output Active
Clock High to Data High-Z
Output Enable Access Time
Output Enable Low to Data Active
Output Enable High to Data High-Z
Clock Enable Setup Time
Data In Setup Time
Read/Write (R/ ) Setup Time
Chip Enable/Select Setup Time
Byte Write Enable (
Clock Enable Hold Time
Data In Hold Time
Read/Write (R/ ) Hold Time
Chip Enable/Select Hold Time
Byte Write Enable (
Address Setup Time
Advance/Load (ADV/ ) Setup Time
Address Hold Time
Advance/Load (ADV/ ) Hold Time
DDQ
x) Setup Time
x) Hold Time
and LOW below 0.4V
Parameter
DDQ
CLZ
.
is a Min. parameter that is worse case at totally different test conditions (0 deg. C, 2.625V) than t
CHZ
(device turn-off) is about 1ns faster than t
6.42
15
Min.
2.5
2.5
2.0
2.0
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
____
____
____
____
10
2
3
0
7.5ns
Commercial and Industrial Temperature Ranges
Max.
7.5
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
5
5
5
CLZ
(device turn-on) at a given temperature and voltage.
Min.
10.5
2.7
2.7
2.0
2.0
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
____
____
____
____
2
3
0
8ns
Max.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
8
5
5
5
Min.
3.0
3.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
____
____
____
____
11
2
3
0
8.5ns
Max.
8.5
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
5
5
5
5319 tbl 24
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CHZ
,

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