AT45DB081D-SU Atmel, AT45DB081D-SU Datasheet - Page 11

• Manufacturer Part Number: AT45DB081D-SU
• Description: IC FLASH 8MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB081D-SU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 264 bytes)
• Speed: 66MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Architecture: Sectored
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 64 KB x 16
• Memory Configuration: 4096 Pages X 264 Bytes
• Clock Frequency: 50MHz
• Supply Voltage Range: 2.5V To 3.6V, 2.7V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.8
8. Sector Protection
3596M–DFLASH–5/10
Main Memory Page Program Through Buffer
The WP pin can be asserted while the device is erasing, but protection will not be activated until
the internal erase cycle completes.
Table 7-3.
Figure 7-1.
Note:
This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program
with Built-in Erase operations. Data is first clocked into buffer 1 or buffer 2 from the input pin (SI)
and then programmed into a specified page in the main memory. To perform a main memory
page program through buffer for the Atmel
byte opcode, 82H for buffer 1 or 85H for buffer 2, must first be clocked into the device, followed
by three address bytes. The address bytes are comprised of three don’t care bits, 12 page
address bits, (PA11 - PA0) that select the page in the main memory where data is to be written,
and nine buffer address bits (BFA8 - BFA0) that select the first byte in the buffer to be written. To
perform a main memory page program through buffer for the binary page size (256-bytes), the
opcode 82H for buffer 1 or 85H for buffer 2, must be clocked into the device followed by three
address bytes consisting of four don’t care bits, 12 page address bits (A19 - A8) that specify the
page in the main memory to be written, and eight buffer address bits (BFA7 - BFA0) that selects
the first byte in the buffer to be written. After all address bytes are clocked in, the part will take
data from the input pins and store it in the specified data buffer. If the end of the buffer is
reached, the device will wrap around back to the beginning of the buffer. When there is a low-to-
high transition on the CS pin, the part will first erase the selected page in main memory to all 1s
and then program the data stored in the buffer into that memory page. Both the erase and the
programming of the page are internally self-timed and should take place in a maximum time of
t
Two protection methods, hardware and software controlled, are provided for protection against
inadvertent or erroneous program and erase cycles. The software controlled method relies on
the use of software commands to enable and disable sector protection while the hardware con-
trolled method employs the use of the Write Protect (WP) pin. The selection of which sectors
that are to be protected or unprotected against program and erase operations is specified in the
nonvolatile Sector Protection Register. The status of whether or not sector protection has been
enabled or disabled by either the software or the hardware controlled methods can be deter-
mined by checking the Status Register.
EP
Command
Chip Erase
. During this time, the status register will indicate that the part is busy.
Refer to errata regarding Chip Erase on
Chip Erase Command
Chip Erase
CS
SI
Each transition
represents 8 bits
Opcode
Byte 1
Opcode
Byte 1
Byte 2
C7H
®
page
DataFlash
52.
Opcode
Byte 3
®
Byte 2
94H
Atmel AT45DB081D
standard page size (264-bytes), a 1-
Opcode
Byte 4
Byte 3
80H
Byte 4
9AH
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