MT46V8M16TG-75:D Micron Technology Inc, MT46V8M16TG-75:D Datasheet - Page 53
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MT46V8M16TG-75:D
Manufacturer Part Number
MT46V8M16TG-75:D
Description
IC DDR SDRAM 128MBIT 66TSOP
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46V16M8TG-6T_LD_TR.pdf
(81 pages)
Specifications of MT46V8M16TG-75:D
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
750ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
140mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46V8M16TG-75:D
Manufacturer:
MICRON
Quantity:
20 000
Figure 26:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
Consecutive READ Bursts
Notes:
COMMAND
COMMAND
COMMAND
ADDRESS
ADDRESS
ADDRESS
DQS
DQS
DQS
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4 or BL = 8 (if BL = 4, the bursts are concatenated; if BL = 8, the second burst interrupts
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order follow-
5. Shown with nominal
6. Example applies only when READ commands are issued to same device.
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
the first).
ing DO b.
Bank,
Bank,
READ
Col n
READ
Bank,
READ
Col n
Col n
T0
T0
T0
CL = 2
t
NOP
NOP
NOP
AC,
T1
T1
T1
CL = 2.5
t
DQSCK, and
CL = 3
53
Bank,
Col b
Bank,
Bank,
READ
Col b
Col b
READ
READ
T2
T2
T2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DQSQ.
DO
n
T2n
T2n
128Mb: x4, x8, x16 DDR SDRAM
DO
n
T3
NOP
T3
NOP
T3
NOP
DON’T CARE
DO
n
T3n
T3n
T3n
©2004 Micron Technology, Inc. All rights reserved.
T4
NOP
T4
T4
NOP
NOP
DO
b
TRANSITIONING DATA
T4n
T4n
T4n
DO
b
Operations
T5
NOP
T5
T5
NOP
NOP
DO
b
T5n
T5n
T5n