M25P05-AVMN6T NUMONYX, M25P05-AVMN6T Datasheet - Page 5
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M25P05-AVMN6T
Manufacturer Part Number
M25P05-AVMN6T
Description
IC FLASH 512KBIT 40MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet
1.M25P05-AVMN6T.pdf
(42 pages)
Specifications of M25P05-AVMN6T
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512K (64K x 8)
Speed
40MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1621-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P05-AVMN6TP
Manufacturer:
FREESCALE
Quantity:
110
Company:
Part Number:
M25P05-AVMN6TP
Manufacturer:
NUMONYX
Quantity:
2 350
Part Number:
M25P05-AVMN6TP
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
M25P05-AVMN6TP(25P05VP)
Manufacturer:
TI
Quantity:
13
SIGNAL DESCRIPTION
Serial Data Output (Q). This output signal is
used to transfer data serially out of the device.
Data is shifted out on the falling edge of Serial
Clock (C).
Serial Data Input (D). This input signal is used to
transfer data serially into the device. It receives in-
structions, addresses, and the data to be pro-
grammed. Values are latched on the rising edge of
Serial Clock (C).
Serial Clock (C). This input signal provides the
timing of the serial interface. Instructions, address-
es, or data present at Serial Data Input (D) are
latched on the rising edge of Serial Clock (C). Data
on Serial Data Output (Q) changes after the falling
edge of Serial Clock (C).
Chip Select (S). When this input signal is High,
the device is deselected and Serial Data Output
(Q) is at high impedance. Unless an internal Pro-
gram, Erase or Write Status Register cycle is in
progress, the device will be in the Standby mode
(this is not the Deep Power-down mode). Driving
Chip Select (S) Low enables the device, placing it
in the Active Power mode.
After Power-up, a falling edge on Chip Select (S)
is required prior to the start of any instruction.
Hold (HOLD). The Hold (HOLD) signal is used to
pause any serial communications with the device
without deselecting the device.
During the Hold condition, the Serial Data Output
(Q) is high impedance, and Serial Data Input (D)
and Serial Clock (C) are Don’t Care.
To start the Hold condition, the device must be se-
lected, with Chip Select (S) driven Low.
Write Protect (W). The main purpose of this in-
put signal is to freeze the size of the area of mem-
ory that is protected against program or erase
instructions (as specified by the values in the BP1
and BP0 bits of the Status Register).
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