PSD813F1A-90MI STMicroelectronics, PSD813F1A-90MI Datasheet - Page 25

• Manufacturer Part Number: PSD813F1A-90MI
• Description: IC FLASH 1MBIT 90NS 52QFP
• Manufacturer: STMicroelectronics

Specifications of PSD813F1A-90MI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (128K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1978

Writing the OTP Row
Writing to the OTP row (64 bytes) can only be
done once per byte, and is enabled by an instruc-
tion. This instruction is composed of three specific
WRITE operations of data bytes at three specific
memory locations followed by the data to be
stored in the OTP row (refer to
Figure 7. EEPROM SDP Enable Flowcharts
Page Write
Instruction
SDP ENABLE ALGORITHM
WRITE AAh to
Address AAAh
WRITE 55h to
WRITE A0h to
Address 555h
Address 555h
SDP is set
Table 8., page
Page Write
Instruction
20).
in Memory
During the WRITE operations, address bit A6 must
be zero, while address bits A5-A0 define the OTP
Row byte to be written while any EEPROM Sector
Select signal (EESi) is active. Writing the OTP
Row is allowed only when SDP mode is not en-
abled.
Write
WRITE Data to
WRITE AAh to
Address AAAh
WRITE A0h to
WRITE 55h to
Address 555h
Address 555h
be Written in
any Address
SDP
Set
(Write Cycle Time)
not Set
SDP
Write Data
after tWC
SDP Set
+
WRITE
is enabled
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