M29DW640F70N6E NUMONYX, M29DW640F70N6E Datasheet - Page 26

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M29DW640F70N6E

Manufacturer Part Number
M29DW640F70N6E
Description
IC FLASH 64MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of M29DW640F70N6E

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Command interface
4.2.2
4.2.3
4.2.4
26/74
Quadruple Word Program command
This is used to write a page of four adjacent Words, in x16 mode, in parallel. The addresses
of the four Words must differ only in A1 and A0.
Five bus write cycles are necessary to issue the command.
1.
2.
3.
4.
5.
Double Byte Program
This is used to write two adjacent Bytes in x8 mode, in parallel. The addresses of the two
Bytes must differ only in DQ15A-1.
Three bus write cycles are necessary to issue the command.
1.
2.
3.
Quadruple Byte Program
This is used to write four adjacent Bytes in x8 mode, in parallel. The addresses of the four
Bytes must differ only in A0, DQ15A-1.
Five bus write cycles are necessary to issue the command.
1.
2.
3.
4.
5.
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Word to be written.
The third bus cycle latches the Address and the Data of the second Word to be written.
The fourth bus cycle latches the Address and the Data of the third Word to be written.
The fifth bus cycle latches the Address and the Data of the fourth Word to be written
and starts the Program/Erase Controller.
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Byte to be written.
The third bus cycle latches the Address and the Data of the second Byte to be written
and starts the Program/Erase Controller.
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Byte to be written.
The third bus cycle latches the Address and the Data of the second Byte to be written.
The fourth bus cycle latches the Address and the Data of the third Byte to be written.
The fifth bus cycle latches the Address and the Data of the fourth Byte to be written and
starts the Program/Erase Controller.
command
command
M29DW640F

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