M29DW640F70N6E NUMONYX, M29DW640F70N6E Datasheet - Page 7

• Manufacturer Part Number: M29DW640F70N6E
• Description: IC FLASH 64MBIT 70NS 48TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of M29DW640F70N6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 64M (8Mx8, 4Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M29DW640F
1
Summary description
The M29DW640F is a 64 Mbit (8Mb x8 or 4Mb x16) non-volatile memory that can be read,
erased and reprogrammed. These operations can be performed using a single low voltage
(2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode.
The device features an asymmetrical block architecture, with 16 parameter and 126 main
blocks, divided into four Banks, A, B, C and D, providing multiple Bank operations. While
programming or erasing is underway in one group of banks (from 1 to 3), reading can be
conducted in any of the other banks. The bank architecture is summarized in
of the Parameter Blocks are at the top of the memory address space, and eight are at the
bottom.
The M29DW640F has one extra 256 Byte block (Extended Block) that can be accessed
using a dedicated command. The Extended Block can be protected and so is useful for
storing security information. However the protection is irreversible, once protected the
protection cannot be undone.
Each block can be erased independently, so it is possible to preserve valid data while old
data is erased. The blocks can be protected to prevent accidental Program or Erase
commands from modifying the memory. Program and Erase commands are written to the
Command Interface of the memory. An on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by taking care of all of the special
operations that are required to update the memory contents. The end of a program or erase
operation can be detected and any error conditions identified. The command set required to
control the memory is consistent with JEDEC standards.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the
memory. They allow simple connection to most microprocessors, often without additional
logic.
The memory is offered in TSOP48 (12x20mm), and TFBGA48 (6x8mm, 0.8mm pitch)
packages.
In order to meet environmental requirements, ST also offers the in ECOPACK
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
The memory is supplied with all the bits erased (set to ’1’).
Summary description
Table
®
packages.
2. Eight
7/74