TC55VBM316AFTN55 Toshiba, TC55VBM316AFTN55 Datasheet - Page 10

• Manufacturer Part Number: TC55VBM316AFTN55
• Description: IC SRAM 8MBIT 55NS 48TSOP
• Manufacturer: Toshiba

Specifications of TC55VBM316AFTN55

• Format - Memory: RAM
• Memory Type: SRAM
• Memory Size: 8M (512K x 16)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: TC55W800FT-55(M); TC55W800FT-55M; TC55W800FT5(M); TC55W800FT5(MWR); TC55W800FT5(Y); TC55W800FT55(M); TC55W800FT55(MWR); TC55W800FT55M; TC55W800FT55MLA; TC55W800FT5M; TC55W800FT5M; TC55W800FT5Y; TC55W800FT5Y

Note:
A0~A18 (Word Mode)
I/O1~16 (Word Mode)
I/O1~16 (Word Mode)
WRITE CYCLE 4 (
(1)
(2)
(3)
(4)
(5)
UB , LB
R/W remains HIGH for the read cycle.
If CE1 (or UB or LB ) goes LOW(or CE2 goes HIGH) coincident with or after R/W goes LOW, the
outputs will remain at high impedance.
If CE1 (or UB or LB ) goes HIGH(or CE2 goes LOW) coincident with or before R/W goes HIGH, the
outputs will remain at high impedance.
If OE is HIGH during the write cycle, the outputs will remain at high impedance.
Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be
applied.
Address
D
R/W
CE2
CE
OUT
D
IN
1
UB LB
,
CONTROLLED)
t
AS
Hi-Z
(See Note 5)
t
COE
t
BE
(See Note 4)
t
t
WC
ODW
t
t
CW
CW
t
BW
TC55VBM316AFTN/ASTN40,55
t
WP
VALID DATA IN
t
DS
t
DH
t
WR
Hi-Z
2002-08-05 10/15