DP8421AV-25 National Semiconductor, DP8421AV-25 Datasheet - Page 23

IC CTRLR/DVR CMOS PROGRAM 68PLCC

DP8421AV-25

Manufacturer Part Number
DP8421AV-25
Description
IC CTRLR/DVR CMOS PROGRAM 68PLCC
Manufacturer
National Semiconductor
Datasheet

Specifications of DP8421AV-25

Controller Type
Dynamic RAM (DRAM)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP8421AV-25

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15a Notice that RFRQ will be asserted from a positive edge
5 0 Refresh Options
5 1 3 Refresh Request Acknowledge
The DP8420A 21A 22A can be programmed to output in-
ternal refresh requests When the user programs ECAS0
negated (1) and or address pipelining mode is selected the
WE output functions as RFRQ RFRQ (WE) will be asserted
by one of two events
First when the external circuitry pulses low the input RFSH
which will request an external refresh
Second when the internal refresh clock has expired which
signals that another refresh is needed
An example of the first case where an external refresh is
requested while RFRQ is negated (1) is shown in Figure
of clock
On the second case when the RFRQ is asserted from the
expiration of the internal refresh clock the user has two
options
FIGURE 15b Automatic Internal Refresh with Refresh Request (3T of RAS Low during Refresh Programmed)
FIGURE 15a Externally Controlled Single and Burst Refresh with Refresh Request
(RFRQ) Output (2 Periods of RAS Low during Refresh Programmed)
(Continued)
23
First if DISRFSH is negated an automatic internal refresh
will take place See Figure 15b
Second with DISRFSH asserted RFRQ will stay asserted
until RFSH is pulsed low This option will cause an external-
ly requested burst refresh to take place See Figure 15c
RFRQ will go high and then assert (toggle) if additional peri-
ods of the internal refresh clock have expired and neither an
externally controlled refresh nor an automatically controlled
internal refresh have taken place see Figure 15d If a time
critical event or long accesses like page static column
mode can not be interrupted RFRQ pulsing high can be
used to increment a counter This counter can be used to
perform a burst refresh of the number of refreshes missed
(through the RFSH input)
TL F 8588 – 66
TL F 8588 – 67

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