DP8421AV-25 National Semiconductor, DP8421AV-25 Datasheet - Page 56

IC CTRLR/DVR CMOS PROGRAM 68PLCC

DP8421AV-25

Manufacturer Part Number
DP8421AV-25
Description
IC CTRLR/DVR CMOS PROGRAM 68PLCC
Manufacturer
National Semiconductor
Datasheet

Specifications of DP8421AV-25

Controller Type
Dynamic RAM (DRAM)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP8421AV-25

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13 0 AC Timing Parameters
Unless otherwise stated V
DRAMs per bank including trace capacitance (Note 2)
Two different loads are specified
C
C
Number
L
L
e
e
50 pF loads on all outputs except
150 pF loads on Q0–8 9 10 and WE or
tHMLADD
tSADDML
tWML
tSADAQML Mode Address Setup to AREQ Asserted
tHADAQML Mode Address Held from AREQ Asserted
tSCSARQ
tSMLARQ
Symbol
Mode Address Held from ML Negated
Mode Address Setup to ML Negated
ML Pulse Width
CS Asserted Setup to
AREQ Asserted
ML Asserted Setup to AREQ Asserted
CC
e
Parameter Description
5 0V
Programming
g
10% 0 C
FIGURE 44 500 Programming
(Continued)
k
T
A k
56
70 C the output load capacitance is typical for 4 banks of 18
C
C
C
H
H
H
e
e
e
Min
15
51
10
8
6
0
6
50 pF loads on all outputs except
125 pF loads on RAS0– 3 and CAS0–3 and
380 pF loads on Q0– 8 9 10 and WE
8420A 21A 22A-20
C
L
Max
Min
15
51
10
8
6
0
6
C
H
Max
Min
15
38
10
7
6
0
6
8420A 21A 22A-25
C
L
Max
Min
15
38
10
7
6
0
6
TL F 8588 – F7
C
H
Max

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