PCF85134HL/1,118 NXP Semiconductors, PCF85134HL/1,118 Datasheet - Page 18

• Manufacturer Part Number: PCF85134HL/1,118
• Description: IC LCD DISPLAY DRVR 60SEG 80LQFP
• Manufacturer: NXP Semiconductors

Specifications of PCF85134HL/1,118

• Package / Case: 80-LQFP
• Display Type: LCD
• Configuration: 60 Segment
• Interface: I²C
• Digits Or Characters: Any Digit Type
• Current - Supply: 8µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 30
• Number Of Segments: 240
• Maximum Clock Frequency: 400 KHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Maximum Supply Current: 50 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5060-2

NXP Semiconductors
PCF85134_1
Product data sheet
7.13 Output bank selector
7.14 Input bank selector
7.15 Blinker
Once the display RAM of the first PCF85134 has been written, the second PCF85134 is
selected by sending the device-select command again. This time however the command
matches the second device's hardware subaddress. Next the load-data-pointer command
is sent to select the preferred display RAM address of the second PCF85134.
This last step is very important because during writing data to the first PCF85134, the
data pointer of the second PCF85134 is incremented. In addition, the hardware
subaddress should not be changed whilst the device is being accessed on the I
interface.
The output bank selector (see
address for transfer to the display register. The actual row selected depends on the
particular LCD drive mode in operation and on the instant in the multiplex sequence.
The SYNC signal resets these sequences to the following starting points: bit 3 for
1:4 multiplex, bit 2 for 1:3 multiplex, bit 1 for 1:2 multiplex, and bit 0 for static mode.
The PCF85134 includes a RAM bank switching feature in the static and 1:2 multiplex drive
modes. In the static drive mode, the bank-select command may request the contents of
row 2 to be selected for display instead of the contents of row 0. In the 1:2 mode, the
contents of rows 2 and 3 may be selected instead of rows 0 and 1. This gives the
provision for preparing display information in an alternative bank and to be able to switch
to it, once it is assembled.
The input bank selector loads display data into the display RAM in accordance with the
selected LCD drive configuration. Display data can be loaded in row 2 in static drive mode
or in rows 2 and 3 in 1:2 multiplex drive mode by using the bank-select command. The
input bank selector functions independently to the output bank selector.
The display blink capabilities of the PCF85134 are very versatile. The whole display can
blink at frequencies selected by the blink-select command (see
frequencies are fractions of the clock frequency. The ratios between the clock and blink
frequencies depend on the blink mode selected (see
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In 1:4 multiplex mode, all RAM addresses of row 0 are selected, these are followed by
the contents of row 1, 2, and then 3
In 1:3 multiplex mode, rows 0, 1, and 2 are selected sequentially
In 1:2 multiplex mode, rows 0 and 1 are selected
In static mode, row 0 is selected
Rev. 01 — 17 December 2009
Table
13) selects one of the four rows per display RAM
Universal LCD driver for low multiplex rates
Table
7).
Table
PCF85134
14). The blink
© NXP B.V. 2009. All rights reserved.
2
C-bus
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