PCF85134HL/1,118 NXP Semiconductors, PCF85134HL/1,118 Datasheet - Page 22

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PCF85134HL/1,118

Manufacturer Part Number
PCF85134HL/1,118
Description
IC LCD DISPLAY DRVR 60SEG 80LQFP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF85134HL/1,118

Package / Case
80-LQFP
Display Type
LCD
Configuration
60 Segment
Interface
I²C
Digits Or Characters
Any Digit Type
Current - Supply
8µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Digits
30
Number Of Segments
240
Maximum Clock Frequency
400 KHz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Maximum Supply Current
50 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5060-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF85134HL/1,118
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
PCF85134_1
Product data sheet
8.1.4 I
8.1.5 Input filters
8.2 I
The PCF85134 acts as an I
transmit data to an I
the acknowledge signals of the selected devices. Device selection depends on the
I
In single device applications, the hardware subaddress inputs A0, A1, and A2 are
normally tied to V
applications A0, A1, and A2 are tied to V
no two devices with a common I
subaddress.
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
Two I
The least significant bit of the slave address is bit R/W. The PCF85134 is a write-only
device. It will not respond to a read access, so this bit should always be logic 0. The
second bit of the slave address is defined by the level tied at input SA0. Two displays
controlled by PCF85134 can be recognized on the same I
The I
condition (S) from the I
slave addresses. All PCF85134s with the same SA0 level acknowledge in parallel to the
slave address. All PCF85134s with the alternative SA0 level ignore the whole I
transfer.
2
2
2
C-bus slave address, the transferred command data and the hardware subaddress.
C-bus controller
C-bus protocol
Up to 16 PCF85134s on the same I
The use of two types of LCD multiplex drive mode on the same I
2
2
C-bus protocol is shown in
C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCF85134.
SS
2
which defines the hardware subaddress 0. In multiple device
C-bus master receiver. The only data output from the PCF85134 are
Rev. 01 — 17 December 2009
2
C-bus master which is followed by one of the available PCF85134
2
C-bus slave receiver. It does not initiate I
2
C-bus slave address have the same hardware
Figure
2
15. The sequence is initiated with a START
C-bus for very large LCD applications
SS
Universal LCD driver for low multiplex rates
or V
DD
using a binary coding scheme, so that
2
C-bus which allows:
PCF85134
2
2
C-bus
C-bus transfers or
© NXP B.V. 2009. All rights reserved.
2
C-bus
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