PCF85134HL/1,118 NXP Semiconductors, PCF85134HL/1,118 Datasheet - Page 23

• Manufacturer Part Number: PCF85134HL/1,118
• Description: IC LCD DISPLAY DRVR 60SEG 80LQFP
• Manufacturer: NXP Semiconductors

Specifications of PCF85134HL/1,118

• Package / Case: 80-LQFP
• Display Type: LCD
• Configuration: 60 Segment
• Interface: I²C
• Digits Or Characters: Any Digit Type
• Current - Supply: 8µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 30
• Number Of Segments: 240
• Maximum Clock Frequency: 400 KHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Maximum Supply Current: 50 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5060-2

NXP Semiconductors
PCF85134_1
Product data sheet
Fig 15. I
EXAMPLES
a) transmit two bytes of RAM data
b) transmit two command bytes
c) transmit one command byte and two RAM date bytes
S 0 1 1 1 0
S 0 1 1 1 0
S 0 1 1 1 0
S 0 1 1 1 0
2
slave address
C-bus protocol
0
0
0
0
R/W = 0
S
A
0
S
A
0
S
A
0
S
A
0
0
0
0
0
After acknowledgement, the control byte is sent defining if the next byte is a RAM or
command information. The control byte also defines if the next byte is a control byte or
further RAM or command data (see
configure the device and then fill the display RAM with little overhead.
Table 8.
The command bytes and control bytes are also acknowledged by all addressed
PCF85134s connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter. Both data pointer and subaddress counter are
automatically updated.
Bit
7
6
5 to 0
A
A
A
A
Fig 16. Control byte format
C
O
0 1
1 0
1 0
R
S
control byte
Symbol
CO
RS
-
Control byte description
A
A
A
A
M
S
B
RAM/command byte
Value
0
1
0
1
Rev. 01 — 17 December 2009
RAM DATA
COMMAND
COMMAND
MSB
S
B
L
CO
7
A
A
A
P
0 0
0 1
Description
continue bit
register selection
not relevant
RS
6
Figure 16
last control byte
control bytes continue
command register
data register
RAM DATA
5
Universal LCD driver for low multiplex rates
4
not relevant
and
3
A
A
A
P
2
Table
COMMAND
RAM DATA
1
mgl753
8). In this way it is possible to
0
LSB
A
A
P
PCF85134
RAM DATA
© NXP B.V. 2009. All rights reserved.
mgl752
A
P
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