DS1862B+ Maxim Integrated Products, DS1862B+ Datasheet - Page 22

IC LASR CTRLR 7CHAN 5.5V 25CSBGA

DS1862B+

Manufacturer Part Number
DS1862B+
Description
IC LASR CTRLR 7CHAN 5.5V 25CSBGA
Manufacturer
Maxim Integrated Products
Type
Laser Diode Controller (Fiber Optic)r
Datasheet

Specifications of DS1862B+

Data Rate
10Gbps
Number Of Channels
7
Voltage - Supply
2.9 V ~ 5.5 V
Current - Supply
3mA
Operating Temperature
-40°C ~ 100°C
Package / Case
25-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
XFP Laser Control and Digital Diagnostic IC
The DS1862 also has flags that are set by certain logical
conditions on signal conditioner (SC) pins: SC-RX-LOL,
SC-RX-LOS, SC-TX-LOS. Similarly, for each latched
signal conditioner flag there are also mask bits that are
capable of preventing the alarm or warning flag from
causing an INTERRUPT pin to assert. Again, flags are
cleared automatically whenever their memory address
is read. See Figure 11 for more detail.
In addition to alarms and warnings, the DS1862 also
has quick-trip (QT) functionality (sometimes referred to
Figure 11. Signal Conditioner and Other Logic
22
SC-RX-LOL (PIN)
*OPEN DRAIN
____________________________________________________________________
VCC2-FAULT
SC-RX-LOS
SC-RX-LOS
SC-RX-LOL
HIGH TX-P
HIGH BIAS
LOW TX-P
TX-FAULT
Warning and Alarm Logic Based on
(PIN)
(PIN)
(PIN)
Quick-Trip Logic and FETG
Shutdown Functionality
Signal Conditioners
*
LATCHED-TX-FAULT
LATCHED-RX-NR
LATCHED-
RX-LOS
MOD-NR (PIN)
SIGNAL CONDITIONER AND MISCELLANEOUS LOGIC
ANY MASK BIT
ANY FLAG
*
RX-LOS (PIN)
LATCHED-
MOD-NR
as fast alarms) that is capable of shutting down the
LASER with the FETG pin in conjunction with shutting
down I
rents are measured and are compared with user-
defined trip points to set the quick-trip flags: QT LOW
TX-P, QT HIGH TX-P, and QT HIGH BIAS. These flags
are also capable of being masked to prevent FETG
from being asserted when an out-of-tolerance condition
is detected. FETG is not asserted by setting the TX-D
pin, SOFT TX-D, or P-DOWN/RST pin to a high state,
however, I
Figure 12 for more detail.
LATCHED-TX-FAULT
INTERRUPT (PIN)
MODSET
P-DOWN/RST
SC-TX-LOS
SC-RX-LOL
MODSET
(PIN)
(PIN)
(PIN)
and I
, and I
TIMER
BIASSET
BIASSET
. I
BMD
will shut down. See
LATCHED-TX-NR
and I
LATCHED-RESET-DONE
LATCHED
RX-CDR-NL
BIASSET
cur-

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