LDS8160-002-T2 IXYS, LDS8160-002-T2 Datasheet - Page 6

• Manufacturer Part Number: LDS8160-002-T2
• Description: IC LED DVR WHT/RGB BCKLGT 16WQFN
• Manufacturer: IXYS
• Series: LED-Sense™, Power-Lite™r
• Type: Backlight, White LED, RGB (I²C Interface)r

Specifications of LDS8160-002-T2

• Topology: Linear (LDO), PWM
• Number Of Outputs: 6
• Internal Driver: Yes
• Type - Primary: Backlight
• Type - Secondary: RGB, White LED
• Frequency: 1.2MHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 16-WQFN, 16-miniQFN
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 25mA
• Internal Switch(s): Yes
• Efficiency: 80%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Details
• Other names: LDS8160-002-T2-2

LDS8160
WRITE INSTRUCTION SEQUENCE
Standard protocol:
REGISTER CONFIGURATION AND PROGRAMMING
© 2009 IXYS Corp.
Characteristics subject to change without notice
ADDRESS
Write Instruction Example - Setting 20mA Current in LEDB1 and LEDB2
00h
01h
02h
03h
04h
05h
06h
07h
DESCRIPTION
Bank A Current setting
Bank B Current setting
Bank C Current setting
Channel Enable
Global PWM Dimming
Bank A PWM Duty Cycle
Bank B PWM Duty Cycle
Bank C PWM Duty Cycle
BITS
8
8
8
6
8
8
8
8
NOTES
Reg00h – Reg02h data code = (I
converted into hex format
Bits 5:0 = 1 enables LEDs C2, C1, B2, B1, A2, A1 respectively
(See Table 1).
Both LEDs from one bank should be disabled to minimize
power consumption.
Log mode: (default)
Simultaneously decreases I
per step (256 steps).
Data Code 00h = 0 dB dimming, FEh = – 72 dB FFh = OFF
Example: 50% brightness reduction ( – 6dB) requires:
– 6dB / – 0.17dB = 35 (decimal) = 23h steps
Linear Mode:
Simultaneously decreases I
Global Dimming Code (Reg04h data) from PWM Duty Cycle
Code (Reg05h – Reg07h data)
Data Code 00h = 0 dimming, If Global Dimming Code is equal
or exceeds PWM Duty Cycle Code, I
Log Mode: (default):
~ – 0.17dB dimming per LSB for < 98% Dimming Level (i.e. >
2% Duty Cycle) from full scale;
Refer to 8 to 12 bit conversion curve (Figure 3 and Table
A4.1) for resolution in range 100% to 98% Dimming Level
(i.e. 0% to 2% Duty Cycle).
Data Code 00h = 0% Duty Cycle or 100% Dimming Level,
FFh = 100% Duty Cycle or 0% Dimming Level
Example: 50% brightness reduction ( – 6dB) requires: 255 –
(– 6 dB / – 0.17 dB) = 255 – 35 = 220 (decimal) = DCh steps
Linear Mode:
PWM Duty Cycle resolution ~ 0.39% per LSB
Code 00h = 0% Duty Cycle, FFh = 100% Duty Cycle
6
LED
LED
in banks A – C by ~ – 0.17 dB
in banks A – C by subtracting
LED
/ 0.125 mA) (decimal)
LED
Doc. No. 8160_DS, Rev. N1.0
= 0 mA.