HCPL-316J-500E Avago Technologies US Inc., HCPL-316J-500E Datasheet - Page 25

• Manufacturer Part Number: HCPL-316J-500E
• Description: OPTOCOUPLER 2CH 2.5A 16-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-316J-500E

• Configuration: High-Side
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Input Type: Differential
• Delay Time: 300ns
• Current - Peak: 2.5A
• Number Of Configurations: 1
• Number Of Outputs: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Fall Time: 0.1 us
• Rise Time: 0.1 us
• Isolation Voltage: 3750 Vrms
• Maximum Power Dissipation: 1200 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 516-1777-2; HCPL-316J-500E

Other Recommended Components
The application circuit in Figure 62 includes an output
pull-down resistor, a DESAT pin protection resistor, a
FAULT pin capacitor (330 pF), and a FAULT pin pull-up
resistor.
Output Pull-Down Resistor
During the output high transition, the output voltage
rapidly rises to within 3 diode drops of V
current then drops to zero due to a capacitive load, the
output voltage will slowly rise from roughly V
to V
the output voltage to V
between the output and V
static current of several 650 μA while the output is high.
Pull-down resistor values are dependent on the amount
of positive supply and can be adjusted according to the
formula, R
DESAT Pin Protection
The freewheeling of flyback diodes connected across
the IGBTs can have large instantaneous forward voltage
transients which greatly exceed the nominal forward
voltage of the diode. This may result in a large negative
voltage spike on the DESAT pin which will draw substan-
tial current out of the IC if protection is not used. To limit
this current to levels that will not damage the IC, a 100
ohm resistor should be inserted in series with the DE-
SAT diode. The added resistance will not alter the DESAT
threshold or the DESAT blanking time.
Figure 65. Output pull-down resistor.
25
HCPL-316J
CC2
within a period of several microseconds. To limit
V
DESAT
LED2+
V
V
pull-down
OUT
CC2
V
V
V
V
EE
EE
C
E
16
15
14
13
12
11
10
9
= [V
R
PULL-DOWN
CC2
CC2
-3 * (V
EE
-3(V
R
g
is recommended to sink a
BE
BE
), a pull-down resistor
)] / 650 μA.
CC2
Figure 66. DESAT pin protection.
HCPL-316J
. If the output
CC2
V
DESAT
-3(V
LED2+
V
V
OUT
V
V
CC2
V
V
EE
EE
E
C
BE
16
15
14
13
12
11
10
9
)
Capacitor on FAULT Pin for High CMR
Rapid common mode transients can affect the fault
pin voltage while the fault output is in the high state. A
330 pF capacitor (Fig. 66) should be connected between
the fault pin and ground to achieve adequate CMOS
noise margins at the specified CMR value of 15 kV/μs.
The added capacitance does not increase the fault out-
put delay when a desaturation condition is detected.
Pull-up Resistor on FAULT Pin
The FAULT pin is an open-collector output and therefore
requires a pull-up resistor to provide a high-level signal.
Driving with Standard CMOS/TTL for High CMR
Capacitive coupling from the isolated high voltage
circuitry to the input referred circuitry is the primary
CMR limitation. This coupling must be accounted for to
achieve high CMR perform ance. The input pins V
V
switching of the output under extreme common mode
transient conditions. Input drive circuits that use pull-up
or pull-down resistors, such as open collector configu-
rations, should be avoided. Standard CMOS or TTL drive
circuits are recommended.
IN-
100 pF
100 Ω
must have active drive signals to prevent unwanted
R
g
D
DESAT
Figure 67. FAULT pin CMR protection.
μC
330 pF
3.3
kΩ
+
–
1
2
3
4
5
6
7
8
V
V
V
GND1
RESET
FAULT
V
V
IN+
IN-
CC1
LED1+
LED1-
IN+
and
HCPL-316J