IRS26310DJPBF International Rectifier, IRS26310DJPBF Datasheet - Page 17

• Manufacturer Part Number: IRS26310DJPBF
• Description: IC DRIVER BRIDGE 3-PHASE 44-PLCC
• Manufacturer: International Rectifier

Specifications of IRS26310DJPBF

• Configuration: 3 Phase Bridge
• Input Type: Non-Inverting
• Delay Time: 530ns
• Current - Peak: 200mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 12 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC (32 Leads)
• Peak Output Current: 200mA
• Input Delay: 530ns
• Output Delay: 530ns
• Supply Voltage Range: 12V To 20V
• Driver Case Style: LCC
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +125°C
• Rohs Compliant: Yes
• Device Type: High Side / Low Side
• Family Hvic: General Purpose HVICs
• Channels: 6
• Topology: Three Phase
• Application: General Purpose / Motor Control / PDP
• Voffset: 600
• Io+ (ma): 200
• Io- (ma): 350
• Shutdown / Reset: Yes
• Separate Power And Logic Ground: Yes
• Integrated Bootstrap Diode: Yes
• Over Current Protection: Yes
• Uvlo: Vcc / Vbs
• Vbsuv+ / Vccuv+ Min (v): 10.4
• Vbsuv+ / Vccuv+ Typ (v): 11.1
• Vbsuv+ / Vccuv+ Max (v): 11.6
• Vbsuv- / Vccuv- Min (v): 10.2
• Vbsuv- / Vccuv- Typ (v): 10.9
• Dt / Sdt Min (ns): 190
• Dt / Sdt Typ (ns): 290
• Dt / Sdt Max (ns): 420
• T On Min (ns): 400
• T On Typ (ns): 530
• T On Max (ns): 750
• T Off Min (ns): 400
• T Off Typ (ns): 530
• T Off Max (ns): 750
• Fault Reporting: Yes
• Package: 44 Lead
• Part Status: Active & Preferred
• Special Features: DC Bus Sensing with Over Voltage Protection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IRS26310DJPbF
Figure 4: Input/output timing diagram
Figure 5: Detailed view of B & C intervals
Deadtime
This family of HVICs features integrated deadtime protection circuitry. The deadtime for these ICs is fixed; other ICs
within IR’s HVIC portfolio feature programmable deadtime for greater design flexibility. The deadtime feature inserts
a time period (a minimum deadtime) in which both the high- and low-side power switches are held off; this is done to
ensure that the power switch being turned off has fully turned off before the second power switch is turned on. This
minimum deadtime is automatically inserter whenever the external deadtime is shorter than DT; external deadtimes
larger than DT are not modified by the gate driver. Figure 6 illustrates the deadtime period and the relationship
between the output gate signals.
The deadtime circuitry of the IRS26310D is matched with respect to the high- and low-side outputs of a given
channel; additionally, the deadtimes of each of the three channels are matched. Figure 6 defines the two deadtime
parameters (i.e., DT
and DT
) of a specific channel; the deadtime matching parameter (MDT) associated with the
1
2
IRS26310D specifies the maximum difference between DT
and DT
. The MDT parameter also applies when
1
2
comparing the DT of one channel of the IRS26310D to that of another.
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