MC34704AEP Freescale Semiconductor, MC34704AEP Datasheet - Page 29

• Manufacturer Part Number: MC34704AEP
• Description: IC POWER MANAGEMENT 56-QFN
• Manufacturer: Freescale Semiconductor

Specifications of MC34704AEP

• Applications: Processor
• Current - Supply: 86mA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Output Voltage: 5 V
• Input Voltage: 2.7 V to 5.5 V
• Switching Frequency: 750 KHz to 2 MHz
• Mounting Style: SMD/SMT
• Number Of Outputs: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• In any of the previous shutdown sequences, VG output will
POWER SUPPLY
the application:
• 1-cell Li-Ion/Polymer: 2.7 to 4.2 V. Typ value is 3.6 V
• USB supply or AC wall adapter: 4.5 to 5.5 V. Typ value is
through its own power input.
LION PIN
FREQUENCY SETTING PIN (FREQ PIN)
one for REG6, 7 & 8, and the other for the rest of the
regulators. To avoid any jitter or interference problems by
having two oscillators on board, the switching frequency will
be derived from the main oscillator using a frequency divider.
SOFT START PIN (SS PIN)
the regulators through programming the SS pin with an
external resistor divider connected between VDDI and AGND
pins (see the
REG8 can be changed and programmed through I
through REG4 soft start value is only set by the SS pin and
cannot be programmed through I
ONOFF PIN
the
• It can be connected to a mechanical switch to turn the
• The device is power off by a command via the I
• The power off by hardware can be masked by a command
• If the device is off and a falling edge is detected at the
Analog Integrated Circuit Device Data
Freescale Semiconductor
stay alive to maintain internal circuitry and logic until all
other regulators are off, then it will shut off.
The battery voltage range is the following depending on
5.0 V. This gives a total input voltage supply range of 2.7
to 5.5 V
For the regulators, each one will be supplied separately
LION pin is always tied to VIN level.
There are two switching frequencies on board the 34704,
Initially at power up, the soft start time will be set for all of
After power up, the soft start value for REG5 through
See section “I
This is a hardware enable/disable feature OR pin for
power On or Off
as well
via the I
ONOFF pin, the device starts up
34704
:
2
C interface
34704A Typical Application
2
C Programmability” for more details.
REG1/VG
500 ns
REG2
REG5, REG3
2
C.
REG4
Diagram).
REG1/VG
2
C interface
500 ns
2
C. REG2
REG2
REG5, REG3
REG4
regulators. REG6, 7 & 8 switching frequency (F
selectable through I
in 250 kHz steps. The rest of the regulators switching
frequency (F
and can be selected between 750 kHz and 2.0 MHz, in
250 kHz steps.
tying the FREQ pin to VDDI. F
pin with an external resistor divider connected between VDDI
and AGND pins. F
Please refer to the “I
80 degrees out of phase) for F
draw by the individual converters from the input supply over
time to reduce the peak input current demand. This allows for
better EMI performance and reduction in the input filter
requirements. F
following distribution is shown for F
regulators grouping is based on their maximum current draw
and attempts to reduce the effect on the input current draw.
• If and only if the device is on and the ONOFF pin is pulled
The switching frequency will be selectable for all of the
F
F
The 34704 uses 4 different phases of switching (clock is
down for a time period (1s as a default and selectable to
2.0 sec, 1.5 sec, 1.0 sec or 0.5 sec via the I
then the device powers off after a second time period
elapses unless it is masked by a command via the I
interface:
• The second period is the same amount of time as the
• When the first period elapses a shutdown flag is set to
• A CPU can read out the shutdown flag to determine
• Power off the device immediately by a command via I
• Ignore the power off by sending a command via I
SW1
SW1
first period so that the counter can be shared
alert the processor that a shutdown signal has been
activated. The ONOFF pin can be released after this
flag is set without affecting what will happen next
what to do
interface (ALLOFF command)
interface to clear the shutdown flag
REG1/VG
500 ns
default value is 2.0 MHz. This value is obtained by
will be selectable through programming the FREQ
REG2
REG5, REG3
SW1
SW1
) will be selectable through the FREQ pin
SW2
2
REG4
has no phase relation with F
2
C to be between 250 kHz and 1.0 MHz
C Programmability” section.
will only be selectable through I
FUNCTIONAL DEVICE OPERATION
SW2
SW1
REG1/VG
500 ns
default value is 500 kHz.
to spread out the current
SW1
REG2
OPERATIONAL MODES
of 2.0 MHz. The
2
SW2
C interface),
SW2
) will be
. The
2
2
2
C
34704
C.
C
2
29
C