LM87CIMT/NOPB National Semiconductor, LM87CIMT/NOPB Datasheet - Page 3

• Manufacturer Part Number: LM87CIMT/NOPB
• Description: IC INTERFACE SER MONITOR 24TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM87CIMT/NOPB

• Function: Hardware Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Speed Control, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: I²C™/SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 2.8 V ~ 3.8 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM87CIMT; *LM87CIMT/NOPB; LM87CIMT

CI
GND
V
INT# /ALERT#
DACOut/NTEST_IN
RESET#
D1−
D1+
+12Vin
+5Vin
Vccp2/D2−
+2.5Vin/D2+
Vccp1
VID4/IRQ4-
VID0/IRQ0
TOTAL PINS
+
# Indicates Active Low (“Not”)
(+2.8 V to +3.8 V)
Name(s)
Pin
Number
20-24
Pin
10
11
12
13
14
15
16
17
18
19
7
8
9
Number
of Pins
24
1
1
1
1
1
1
1
1
1
1
1
1
1
5
Digital I/O
GROUND
POWER
Digital Output
Analog Output/
Digital Input
Digital I/O
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Inputs
Type
An active high input from an external circuit which latches a Chassis
Intrusion event. This line can go high without any clamping action
regardless of the powered state of the LM87. There is also an internal
open-drain output on this line, controlled by Bit 7 of the CI Clear
Register (46h), to provide a minimum 20 ms pulse.
The system ground pin. Internally connected to all circuitry. The ground
reference for all analog inputs and the DAC output. This pin needs to
be connected to a low noise analog ground plane for optimum
performance of the DAC output.
+3.3 V V
(electrolytic or tantalum) and 0.1 μF (ceramic) bypass capacitors.
Interrupt active low open-drain output. This output is enabled when Bit
1 in the Configuration Register is set to 1. The default state is disabled.
It has an on-chip 100 kΩ pullup resistor. Alternately used as an active
low output to signal SMBus Alert Response Protocol.
0 V to +2.5 V amplitude 8-bit DAC output. When forced high on power
up by an external voltage the NAND Tree Test mode is enabled which
provides board-level connectivity testing.
Master Reset, 5 mA driver (open-drain), active low output with a 20 ms
minimum pulse width. Available when enabled via Bit 4 in the
Configuration register. It also acts as an active low power on RESET
input. It has an on-chip 100 kΩ pullup resistor.
Analog input for monitoring the cathode of the first external
temperature sensing diode.
Analog input for monitoring the anode of the first external temperature
sensing diode.
Analog input for monitoring +12 V.
Analog input for monitoring +5 V.
Digitally programmable analog input for monitoring Vccp2 (0 to 3.6 V
input range) or the cathode of the second external temperature sensing
diode.
Digitally programmable analog input for monitoring +2.5 V or the anode
of the second external temperature sensing diode.
Analog input (0 to 3.6 V input range) for monitoring Vccp1, the core
voltage of processore 1.
Digitally programmable dual function digital inputs. Can be
programmed to monitor the VID pins of the Pentium/PRO and Pentium
II processors, that indicate the operating voltage of the processor, or
as interrupt inputs. The values are read in the VID/Fan Divisor Register
and the VID4 Register. These inputs have on-chip 100 kΩ pullup
resistors.
3
+
power. Bypass with the parallel combination of 10 μF
Description
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