LTC6652BHMS8-4.096#PBF Linear Technology, LTC6652BHMS8-4.096#PBF Datasheet - Page 12

IC REF PREC LN 8-MSOP

LTC6652BHMS8-4.096#PBF

Manufacturer Part Number
LTC6652BHMS8-4.096#PBF
Description
IC REF PREC LN 8-MSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC6652BHMS8-4.096#PBF

Reference Type
Series
Voltage - Output
4.096V
Tolerance
±0.1%
Temperature Coefficient
10ppm/°C
Voltage - Input
4.596 ~ 13.2 V
Number Of Channels
1
Current - Quiescent
350µA
Current - Output
16mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Fixed / Adjust / Prog
Precision
Output Voltage (max)
4.096V
Reference Voltage Accuracy (max)
0.1
Line Regulation
50ppm/V
Load Regulation
150ppm/mA
Input Voltage (max)
13.2V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Package Type
MSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Cathode
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC6652BHMS8-4.096#PBFLTC6652BHMS8-4.096
Manufacturer:
LT
Quantity:
10 000
Company:
Part Number:
LTC6652BHMS8-4.096#PBFLTC6652BHMS8-4.096#P
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LTC6652
APPLICATIONS INFORMATION
Hysteresis
The hysteresis data shown in Figure 13 represents the
worst-case data collected on parts from –40°C to 125°C.
The output is capable of dissipating relatively high power,
i.e., for the LT6652-2.5, P
The thermal resistance of the MS8 package is 200°C/W and
this dissipation causes a 11.8°C internal rise. This could
increase the junction temperature above 125°C and may
cause the output to shift due to thermal hysteresis.
PC Board Layout
The mechanical stress of soldering a surface mount volt-
age reference to a PC board can cause the output voltage
to shift and temperature coeffi cient to change. These two
changes are not correlated. For example, the voltage may
shift, but the temperature coeffi cient may not.
To reduce the effects of stress-related shifts, mount the
reference near the short edge of the PC board or in a
corner. In addition, slots can be cut into the board on two
sides of the device.
The capacitors should be mounted close to the package.
The GND and V
to minimize I • R drops. Excessive trace resistance directly
impacts load regulation.
12
–20
–40
80
60
40
20
0
0
LTC6652-2.5 MS8 PACKAGE
3 TYPICAL PARTS
T
A
OUT
= 35 C
Figure 12. Long-Term Drift
300
traces should be as short as possible
600
D
HOURS
= 10.7V • 5.5mA = 58.85mW.
900
1200
6652 F12
1500
IR Refl ow Shift
The different expansion and contraction rates of the materi-
als that make up the lead-free LTC6652 package cause the
output voltage to shift after undergoing IR refl ow. Lead-free
refl ow profi les reach over 250°C, considerably more than
their leaded counterparts. The lead-free IR refl ow profi le
used to experimentally measure output voltage shift in the
LTC6652-2.5 is shown in Figure 14. Similar results can be
expected using a convection refl ow oven. In our experiment,
the serialized parts were run through the refl ow process
twice. The results indicate that the standard deviation of
the output voltage increases with a slight positive mean
shift of 0.003% as shown in Figure 15. While there can be
up to 0.016% of output voltage shift, the overall drift of the
LTC6652 after IR refl ow does not vary signifi cantly.
Power Dissipation
Power dissipation in the LTC6652 is dependent on V
load current, and package. The LTC6652 package has
a thermal resistance, or θ
illustrates allowed power dissipation vs temperature for
this package is shown in Figure 16.
The power dissipation of the LTC6652-2.5V as a function
of input voltage is shown in Figure 17. The top curve
shows power dissipation with a 5mA load and the bottom
curve shows power dissipation with no load.
Figure 13. Hysteresis Plot –40°C to 125°C
35
30
25
20
15
10
5
0
–250
125°C TO 25°C
–150
DISTRIBUTION (ppm)
JA
–50
, of 200°C/W. A curve that
50
–40°C TO 25°C
150
6652 F13
6652fc
IN
,

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