MAX17528GTJ+ Maxim Integrated Products, MAX17528GTJ+ Datasheet - Page 17

IC PWM CTRLR STP-DWN 32TQFN-EP

MAX17528GTJ+

Manufacturer Part Number
MAX17528GTJ+
Description
IC PWM CTRLR STP-DWN 32TQFN-EP
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17528GTJ+

Applications
Controller, Intel IMVP-6.5™ GMCH
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
0.01 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIN
28
29
30
31
32
EP (GND)
VRHOT
NAME
TIME
CCV
ILIM
V
______________________________________________________________________________________
CC
Active-Low Open-Drain Output of Internal Comparator. VRHOT is pulled low when the voltage at
THRM goes below 1.5V (30% of V
Slew-Rate Adjustment Pin.
the internal error-amplifier target. The sum of the resistance between TIME and GND (R
determines the nominal slew rate:
The guaranteed R
transitions and to the transition from boot mode to VID. If the VID DAC inputs are clocked, the slew
rate for all other VID transitions is set by the rate at which they are clocked, up to a maximum slew
rate equal to the nominal slew rate defined above.
The startup and shutdown slew rates are always 1/8 of nominal slew rate to minimize surge currents.
If
Valley Current-Limit Adjustment Input. The valley current-limit threshold voltage at CSP to CSN
equals precisely 1/10 the differential TIME to ILIM voltage over a 0.1V to 0.5V range (10mV to 50mV
current-sense range). The negative current-limit threshold is nominally -125% of the corresponding
valley current-limit threshold. Connect ILIM directly to V
setting of 22.5mV (typ) nominal.
Controller Supply Voltage. Connect to a 4.5V to 5.5V source. Bypass to GND with 1µF minimum.
Integrator Capacitor Connection. Connect a capacitor (C
integration time constant. Choose the capacitor value according to:
where G
frequency set by the R
The integrator is internally disabled during any downward output-voltage transition that occurs in
pulse-skipping mode, and remains disabled until the transition blanking period expires and the
output reaches regulation (error amplifier transition detected).
Exposed Pad (Back Side) and Analog Ground. Internally connected to GND. Connect to the ground
plane through a thermally enhanced via.
SLOW
m(CCV)
is high, the slew rate is reduced to 1/2 of nominal.
Intel IMVP-6.5/GMCH Controllers
= 320µS (max) is the integrator’s transconductance and f
TIME
range is between 35.7k and 178k . This nominal slew rate applies to VID
TON
TIME regulates to 2.0V and the load current determines the slew rate of
value.
Slew rate = (12.5mV/µs) x (71.5k /R
16 x (C
CC
). VRHOT is high-impedance in shutdown.
CCV
FUNCTION
/G
1-Phase Quick-PWM
m(CCV)
Pin Description (continued)
) x f
CC
CCV
SW
to set the default current-limit threshold
) from CCV to GND to set the
>> 1
TIME
)
SW
is the switching
TIME
)
17

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