MAX17528GTJ+ Maxim Integrated Products, MAX17528GTJ+ Datasheet - Page 37

• Manufacturer Part Number: MAX17528GTJ+
• Description: IC PWM CTRLR STP-DWN 32TQFN-EP
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17528GTJ+

• Applications: Controller, Intel IMVP-6.5™ GMCH
• Voltage - Input: 4.5 ~ 5.5 V
• Number Of Outputs: 1
• Voltage - Output: 0.01 ~ 1.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The minimum current-limit threshold must be high
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I
half the ripple current; therefore:
where:
where R
R
sensing approach.
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the out-
put capacitance and processor’s power dissipation
requirements. The controller uses a transconductance
amplifier to set the transient and DC output voltage
droop (Figure 3) as a function of the load. This adjusta-
bility allows flexibility in the selected current-sense
resistor value or inductor DCR, and allows smaller cur-
rent-sense resistance to be used, reducing the overall
power dissipated.
Connect a resistor (R
the DC steady-state droop (load line) based on the
required voltage-positioning slope (R
where the effective current-sense resistance (R
depends on the current-sense method (see the Current
Sense section), and the voltage-positioning amplifier’s
transconductance (G
defined in the Electrical Characteristics table. When the
inductors’ DCR is used as the current-sense element
(R
include a thermistor to minimize the temperature
dependence of the voltage-positioning slope as shown
in Figure 1.
The output filter capacitor must have low enough effec-
tive series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
LX-CSN
SENSE
SENSE
I
VALLEY
= R
is the ratio of resistor-divider with DCR-
I
VALLEY
DCR
is the sensing resistor and R
=
R
), the current-sense design should
FB
______________________________________________________________________________________
R
V
SENSE
Steady-State Voltage Positioning
Output Capacitor Selection
LIMIT
>
=
FB
I
LOAD MAX
R
m(FB)
) between FB and V
SENSE m FB
Voltage Positioning and
R
=
DROOP
(
DCR
Loop Compensation
) is typically 600µS as
G
)
⎛
⎜
⎝
(
×
1
V
LIMIT
R
−
R
DROOP
)
CSP CSN
Intel IMVP-6.5/GMCH Controllers
LIR
LX CSN
LOAD(MAX)
2
−
−
⎞
⎟
⎠
):
OUT
CSP-CSN
SENSE
minus
to set
/
)
In CPU V
the output is subject to large-load transients, the output
capacitor’s size typically depends on how much ESR is
needed to prevent the output from dipping too low
under a load transient. Ignoring the sag due to finite
capacitance:
In non-CPU applications, the output capacitor’s size
often depends on how much ESR is needed to maintain
an acceptable level of output ripple voltage. The output
ripple voltage of a step-down controller equals the total
inductor ripple current multiplied by the output capaci-
tor’s ESR. The maximum ESR to meet ripple require-
ments is:
where f
capacitance value required relates to the physical size
needed to achieve low ESR, as well as to the chemistry
of the capacitor technology. Thus, the capacitor is usu-
ally selected by ESR and voltage rating rather than by
capacitance value (this is true of polymer types).
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent V
problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
longer a problem (see the V
in the Transient Response section).
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
where:
and:
where C
total ESR, R
Output Capacitor Stability Considerations
1-Phase Quick-PWM
SW
OUT
CORE
R
ESR
DROOP
is the switching frequency. The actual
R
(
is the total output capacitance, R
R
EFF
ESR
converters and other applications where
≤
⎡
⎢
⎢
⎣
f
=
ESR
(
+
V
R
is the voltage-positioning slope, and
IN
R
ESR
PCB
f
=
ESR
−
SAG
V f
2π
V
IN SW
+
OUT
)
R
R
≤
≤
DROOP
EFF OUT
and V
SAG
f
∆
SW
L
)
π
1
I
V
LOAD MAX
C
OUT
V
and V
STEP
SOAR
+
(
⎤
⎥
⎥
⎦
R
V
PCB
RIPPLE
SOAR
)
from causing
equations
ESR
is the
37