ISL8112IRZ Intersil, ISL8112IRZ Datasheet - Page 22

• Manufacturer Part Number: ISL8112IRZ
• Description: IC MAIN POWER SUPP CTRLR 32-QFN
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of ISL8112IRZ

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.7 ~ 5.5 V
• Current - Output: 200mA
• Voltage - Input: 5.5 ~ 25 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Power - Output: 5mW
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency - Switching: -

Adjustable-Output Feedback (Dual-Mode FB)
Connect FB1 to GND to enable the fixed 5V or tie FB1 to
VCC to set the fixed 1.5V output. Connect a resistive
voltage-divider at FB1 between output and GND to adjust
the respective output voltage between 0.7V and 5.5V
(Figure 27). Choose R2 to be approximately 10k and solve
for R1 using Equation 5.
where V
Likewise, connect OUT2REF to VCC to enable the fixed
3.3V or tie OUT2REF to VREF2 to set the fixed 1.05V
output. Set OUT2REF from 0 to 2.50V for SMPS2 tracking
mode (Figure 28).
R1
FIGURE 28. SETTING V
ISL88734
FIGURE 27. SETTING V
ISL88732
ISL88732
ISL88733
ISL6236
ISL88733
ISL8112
ISL88734
ISL88732
ISL88732
ISL88733
ISL6236
ISL88733
ISL8112
ISL88734
ISL88734
=
UGATE_
UGATE1
UGATE_
UGATE_
UGATE2
UGATE_
LGATE_
LGATE1
LGATE_
LGATE_
LGATE2
LGATE_
REFIN2
VOUT_
VOUT_
VOUT_
OUT2REF
R2
VOUT_
FB1
OUT1
OUT2
VSEN2
VSEN1
⋅
FB_
FB1
FB_
FB_
FB_
⎛
⎜
⎝
UG2
LG2
UG1
V
------------------ - 1
FB1
= 0.7V nominal.
LG1
V
TRACKING
OUT1
FB1
R4
R4
–
⎞
⎟
⎠
OUT2
OUT1
22
WITH A VOLTAGE DIVIDER FOR
Q1
Q1
Q1
Q1
VIN
VIN
VIN
VIN
Q2
Q2
Q2
Q2
Q3
Q3
VIN
VIN
VIN
VIN
Q4
Q4
WITH A RESISTOR DIVIDER
R3
R3
R2
R1
VR
OUT2
OUT2
(EQ. 5)
OUT1
OUT1
ISL8112
where:
• VR = 2V nominal (if tied to VREF1)
or
• VR = 3.3V nominal (if tied to VREF2)
Design Procedure
Establish the input voltage range and maximum load current
before choosing an inductor and its associated ripple-current
ratio (LIR). The following four factors dictate the rest of the
design:
Inductor Selection
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as follows:
1. Input Voltage Range. The maximum value (
2. Maximum Load Current. The peak load current
3. Switching Frequency. This choice determines the basic
4. Inductor Ripple Current Ratio (LIR). LIR is the ratio of the
L
R3
=
must accommodate the maximum AC adapter voltage.
The minimum value (
lowest input voltage after drops due to connectors, fuses
and battery selector switches. Lower input voltages result
in better efficiency.
(ILOAD(MAX)) determines the instantaneous component
stress and filtering requirements and thus drives output
capacitor selection, inductor saturation rating and the
design of the current-limit circuit. The continuous load
current (ILOAD) determines the thermal stress and drives
the selection of input capacitors, MOSFETs and other
critical heat-contributing components.
trade-off between size and efficiency. The optimal
frequency is largely a function of maximum input voltage
and MOSFET switching losses.
peak-peak ripple current to the average inductor current.
Size and efficiency trade-offs must be considered when
setting the inductor ripple current ratio. Low inductor
values cause large ripple currents, resulting in the
smallest size, but poor efficiency and high output noise.
The minimum practical inductor value is one that causes
the circuit to operate at critical conduction (where the
inductor current just touches zero with every cycle at
maximum load). Inductor values lower than this grant no
further size-reduction benefit.
The ISL8112 pulse-skipping algorithm (MODE = GND)
initiates skip mode at the critical conduction point, so the
inductor's operating point also determines the load
current at which PWM/PFM switch over occurs. The
optimum point is usually found between 20% and 50%
ripple current.
=
-------------------------------------------------------------------- -
V
V
IN
R4
OUT_
⋅ ⋅
f LIR I
⋅
⎛
⎝
------------------ - 1
V
(
OUT2
VR
V
IN
⋅
LOAD MAX
+
–
V
OUT_
⎞
⎠
(
V
IN
)
)
(MIN)) must account for the
V
IN
August 10, 2010
(MAX))
(EQ. 6)
(EQ. 7)
FN6396.1