LTC1709EG-8 Linear Technology, LTC1709EG-8 Datasheet - Page 8

IC REG SW 2PH SYNC STPDWN 36SSOP

LTC1709EG-8

Manufacturer Part Number
LTC1709EG-8
Description
IC REG SW 2PH SYNC STPDWN 36SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1709EG-8

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
1.3 ~ 3.5 V
Current - Output
3A
Voltage - Input
4 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Frequency - Switching
-

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LTC1709-8/LTC1709-9
PI FU CTIO S
PLLIN (Pin 6): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50k . The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
NC (Pins 7, 36): Do not connect.
I
tor Compensation Point. Both current comparator’s thresh-
olds increase with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V
SGND (Pin 9): Signal Ground. This pin is common to both
controllers. Route separately to the PGND pin.
V
pin provides true remote output voltage sensing. V
normally drives an external resistive divider that sets the
output voltage.
V
fier. Internal precision resistors capable of being elec-
tronically switched in or out can configure it as a differential
amplifier or an uncommitted op amp.
ATTENOUT (Pin 15): Voltage Feedback Signal Resistively
Divided According to the VID Programming Code.
ATTENIN (Pin 16): The Input to the VID Controlled Resis-
tive Divider.
VID0–VID4 (Pins 17,18, 19, 20, 21): VID Control Logic
Input Pins.
V
PGOOD (Pin 23): Open-Drain Logic Output. PGOOD is
pulled to ground when the voltage on the EAIN pin is not
within 7.5% of its set point.
8
TH
DIFFOUT
OS
BIAS
U
(Pin 8): Error Amplifier Output and Switching Regula-
, V
(Pin 22): Supply Pin for the VID Control Circuit.
OS
(Pin 10): Output of a Differential Amplifier. This
+
U
(Pins 11, 12): Inputs to an Operational Ampli-
U
DIFFOUT
TG2, TG1 (Pins 24, 35): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTV
posed on the switch node voltage SW.
SW2, SW1 (Pins 25, 34): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V
BOOST2, BOOST1 (Pins 26, 33): Bootstrapped Supplies
to the Topside Floating Drivers. External capacitors are
connected between the BOOST and SW pins, and Schottky
diodes are connected between the BOOST and INTV
pins.
BG2, BG1 (Pins 27, 31): High Current Gate Drives for
Bottom N-Channel MOSFETS. Voltage swing at these pins
is from ground to INTV
PGND (Pin 28): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of
C
INTV
Dropout Regulator and the EXTV
control circuits are powered from this voltage source.
Decouple to power ground with a 1 F ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7 F
additional tantalum or other low ESR capacitor.
EXTV
Switch. This switch closes and supplies INTV
ing the internal low dropout regulator whenever EXTV
higher than 4.7V. See EXTV
tions Information section. Do not exceed 7V on this pin
and ensure V
V
coupled to the IC’s signal ground pin.
IN
IN
.
(Pin 32): Main Supply Pin. Should be closely de-
CC
CC
(Pin 29): Output of the Internal 5V Linear Low
(Pin 30): External Power Input to an Internal
EXTVCC
V
CC
IN
.
.
CC
Connection in the Applica-
CC
Switch. The driver and
CC
CC,
superim-
IN
bypass-
.
CC
CC
is

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