IDT88K8483BRI IDT, Integrated Device Technology Inc, IDT88K8483BRI Datasheet - Page 117
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IDT88K8483BRI
Manufacturer Part Number
IDT88K8483BRI
Description
IC SPI-4 EXCHANGE 3PORT 672-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT88K8483BRI.pdf
(162 pages)
Specifications of IDT88K8483BRI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88K8483BRI
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SPI-4 Histogram Measure Launch Register
SPI-4 Histogram Measure Status Register
SPI-4 Histogram Counter Register
LANE
Note: The manual bit alignment is a edge transition histogram measure process. Please refer to Figure 15(Ingress block diagram) and subsequent description for
histogram overview. In normal operation bit alignment is automatic and these registers are not used.
BUSY
ERROR
C[n]
IDT IDT88K8483
Field
Field
Field
Table 85
Table 86
Table 87
R/W
R
R
R
Read /
Read /
Read /
Write
Write
Write
SPI-4 Histogram Measure Launch Register (Block Base=0x0900 Register Offset=0x00)
SPI-4 Histogram Measure Status Register (Block Base=0x0900 Register Offset=0x01)
SPI-4 Histogram Counter Register (Block Base=0x0900 Register Offset=0x02-0x0B)
0:0-0:4
0:0
0:1
0:0-1:1
Bits
Bits
Bits
5
1
1
10
Length
Length
Length
0
0
0
0
Reset
Reset
Reset
State
State
State
117 of 162
LANE field selects the SPI-4 ingress datapath lanes, control lane or SPI-4 egress
associated status channel lanes that will use manual bit alignment.
0:SPI-4 ingress DATA0 lane selected for measurement.
x:SPI-4 ingress DATAx lane selected for measurement.
15:SPI-4 ingress DATA15 lane selected for measurement.
16:SPI-4 ingress CTL selected for measurement.
17:SPI-4 egress status 0 lane selected for measurement.
18:SPI-4 egress status 1 lane selected for measurement.
This field is used to observe when the LANE process in Table 85 is busy for manual
lane assignment procedures and is self cleared when the process completes.The
BUSY field is intended for diagnostics only and is not needed for normal operation.
0:Lane process is complete.
1:Lane process is busy.
This field indicates the result after the manual bit alignment (LANE process) is com-
pleted.
0:Successful measure. This field is auto cleared when a new measure is launched.
1:Aborted indication.
This register holds the histogram measured value. There are 10 registers which
keep the statistic value of a HISTOGRAM measure for a particular lane until a new
measure is launched. These values indicate the eye opening and jitter for each
measured lane.The counter value is used to select the TAP inTable 88.
Description
Description
Description
October 20, 2006
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