IDT88K8483BRI IDT, Integrated Device Technology Inc, IDT88K8483BRI Datasheet - Page 70
IDT88K8483BRI
Manufacturer Part Number
IDT88K8483BRI
Description
IC SPI-4 EXCHANGE 3PORT 672-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT88K8483BRI.pdf
(162 pages)
Specifications of IDT88K8483BRI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88K8483BRI
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Clock Generator Type M
Figure 36 Clock Generator Type M
generator source is the external signal SPI4M_RCLK. The MCLK frequency is selected by the N field in the
The N field value can be modified at any time during normal operation. The SPI-4 operation rate is selected by the external signal SPI4M_CLK_SEL.
The external signal DIV4 configures the prescaler frequency to divide by 4 or 1.
Clock Generator Type T
Type T
signals SPI4A_CLK_SEL and SPI4B_CLK_SEL. The external signal DIV4 configures the prescaler frequency to divide by 4 or 1.
IDT IDT88K8483
Clock generator type M generates the internal clock MCLK and the external SPI-4 main interface clocks (EDCLK, ISCLK, ISCLK_T) as shown in
Clock generator type T generates the SPI-4 tributary interface clocks (EDCLK, ISCLK, ISCLK_T) as shown in
p.70. The clock generator sources are the external signals SPI4A_RCLK and SPI4B_RCLK. SPI-4 operation rate is selected by the external
SPI4A_CLK_SEL
SPI4B_CLK_SEL
SPI4A_RCLK
SPI4B_RCLK
SPI4M_RCLK
SPI4M_CLK_SEL
DIV4
prescaler
div 4/1
DIV4
prescaler
div 4/1
p.70. The MCLK clock is used for the generic interface, the PFP block and the PMON block. The clock
Figure 36 Clock Generator Type M
Figure 37 Clock Generator Type T
* 32 PLL
70 of 162
* 32 PLL
div 2/3/4/5
N
div 2/8
div 2/8
div 4
div 4
MCLK
ISCLK
ISCLK_T
ISCLK_T
ISCLK
EDCLK
EDCLK
MCLK Divider Sticky Register (p.
Figure 37 Clock Generator
October 20, 2006
104).
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