IDT88K8483BRI IDT, Integrated Device Technology Inc, IDT88K8483BRI Datasheet - Page 35
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IDT88K8483BRI
Manufacturer Part Number
IDT88K8483BRI
Description
IC SPI-4 EXCHANGE 3PORT 672-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT88K8483BRI.pdf
(162 pages)
Specifications of IDT88K8483BRI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88K8483BRI
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p.35. The buffers can be concatenated so that data flows from one FIFO into the next.
Flow Control
SPI-4 Ingress Flow Control
SPI-4 Egress Flow Control
receiving starving status from the adjacent device through the status bus, so the LID status is starving, and the LID data is scheduled out in round
robin. When the SPI-4 egress interface starts receiving hungry status from the adjacent device, the LID status is changed to hungry, and the LID data
is scheduled out in round robin. When the SPI-4 egress interface starts receiving satisfied status from the adjacent device, the LID status is changed
to satisfied, and the LID data is not scheduled out.
There are 64 LIDs per PFP, and each calendar has maximum of 256 entries. Each calendar entry can be assign to a specific LID as shown in
8 SPI-4 Egress Calendar Example
with high priority, and the LIDs with hungry status are scheduled in a round robin fashion with low priority. All the LIDs with the starving status are
scheduled first. The LIDs with the hungry status are scheduled only when there are no LIDs with starving status.
(p.
for another credit from the SPI-4 interface status bus before issuing another LID burst. In credit mode, when the SPI-4 egress interface receives
starving status or hungry status from the adjacent device through the status bus, it sets the LID credit to one. When the SPI-4 egress interface
receives satisfied status from the adjacent device, it clears the LID credit to zero.
SPI-4 Ingress Port Buffer Structure
IDT IDT88K8483
Each SPI-4 physical port in the ingress direction has 32 port buffers of 128 bytes as shown in Figure 7 SPI-4 Ingress Port Buffer Structure
There are 3 main parameters for configuring the SPI-4 ingress flow control:
- Maximum number of segments per LID is configured in M field in the
- Starving Free segments per LID is configured in THR_STARV field in the
- Hungry Free segments per LID is configured in THR_HUNG field in the
SPI-4 ingress flow control is described in greater detail in
There are three LID status modes in the SPI-4 egress interface: starving, hungry and satisfied. In normal operation the SPI-4 egress interface is
Each SPI-4 interface has four SPI-4 calendars: two for ingress and two for egress. Only one calendar in each direction is active in a specific time.
The LID status mode in the SPI-4 egress interface (status or credit mode) is configured by CREDIT_EN field in the
125). If status mode is used (CREDIT_EN=0), then data is sent out until the LID status is changed (starving / hungry / satisfied).
If credit mode is used (CREDIT_EN=1), then when the credit is one, the device sends out one data burst, clears to zero the credit, and then waits
SPI-4 Ingress Port Buffer (32 x 128 byte FIFOs, 4K bytes, 16K segments)
p.36. According to the calendar order, the LIDs with starving status are scheduled in a round robin fashion
Figure 7 SPI-4 Ingress Port Buffer Structure
PFP Flow Control (p. 53)
35 of 162
Buffer 31
Buffer 30
Buffer 1
Buffer 0
PFP Buffer Segment Assign Table (p. 120)
.
.
.
PFP Buffer Segment Assign Table (p. 120)
PFP Buffer Segment Assign Table (p. 120)
128 bytes
PFP Flow Control Register
October 20, 2006
Figure
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