CDB42L51 Cirrus Logic Inc, CDB42L51 Datasheet - Page 49

• Manufacturer Part Number: CDB42L51
• Description: BOARD EVAL FOR CS42L51 CODEC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L51

• Main Purpose: Audio, CODEC
• Embedded: Yes, Other
• Utilized Ic / Part: CS42L51, CS8406, CS8415
• Primary Attributes: Stereo, Digital Audio Transmitter and Receiver
• Secondary Attributes: Graphic User Interface, S/PDIF Interface
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• For Use With/related Products: CS42L51
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1005

DS679F1
6. REGISTER DESCRIPTION
All registers are read/write except for the chip I.D. and Revision Register and Interrupt Status Register which are
read only. See the following bit definition tables for bit assignment information. The default state of each bit after a
power-up sequence or reset is listed in each bit description.
All “Reserved” registers must maintain their default state.
Note:
6.1
6.2
Notes:
Reserved
Chip_ID4
7
7
Certain functions are only available when the “Signal Processing Engine to DAC” option is selected using
the DATA_SEL[1:0] bits, as described in section
Chip I.D. and Revision Register (Address 01h) (Read Only)
Chip I.D. (Chip_ID[4:0])
Default: 11011
Function:
I.D. code for the CS42L51. Permanently set to 11011.
Chip Revision (Rev_ID[2:0])
Default: 001
Function:
CS42L51 revision level. Revision B is coded as 001. Revision A is coded as 000.
Power Control 1 (Address 02h)
1. To activate the power-down sequence for individual channels (A or B,) both channels must first be pow-
lect channels, 3.) disable the PDN bit.
Power Down DAC X (PDN_DACX)
Default: 0
0 - Disable
1 - Enable
Function:
DAC channel x will either enter a power-down or muted state when this bit is enabled. See
Recommended channel power-down sequence: 1.) Enable the PDN bit, 2.) enable power-down for the se-
ered down either by enabling the PDN bit or by enabling the power-down bits for both channels. En-
abling the power-down bit on an individual channel basis after the CODEC has fully powered up will
mute the selected channel without achieving any power savings.
PDN_DACB
Chip_ID3
6
6
PDN_DACA
Chip_ID2
5
5
PDN_PGAB
Chip_ID1
4
4
“DAC Data Selection (DATA_SEL[1:0])” on page
PDN_PGAA
Chip_ID0
3
3
PDN_ADCB
Rev_ID2
2
2
PDN_ADCA
Rev_ID1
1
1
Note 1
CS42L51
Rev_ID0
PDN
58.
above.
0
0
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