STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 74

• Manufacturer Part Number: STEVAL-ISB005V1
• Description: BOARD EVAL CHARGER ST7260/L6924D
• Manufacturer: STMicroelectronics
• Type: Battery Managementr

Specifications of STEVAL-ISB005V1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6924, ST72F63BK6M1
• Primary Attributes: 1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
• Secondary Attributes: Powered by Wall Adaptor Also, LED Status Indicators
• Input Voltage: 5 V
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6924D, ST7260
• Other names: 497-8428

Serial communications interface (SCI)
74/139
Serial data format
Word length may be selected as being either 8 or 9 bits by programming the M bit in the
SCICR1 register (see
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the next
frame which contains data.
A Break character is interpreted on receiving “0”s for some multiple of the frame period. At
the end of the last break frame the transmitter inserts an extra “1” bit to acknowledge the
start bit.
Transmission and reception are driven by their own baud rate generator.
Figure 39. Word length programming
Transmitter
The transmitter can send data words of either 8 or 9 bits depending on the M bit status.
When the M bit is set, word length is 9 bits and the 9th bit (the MSB) has to be stored in the
T8 bit in the SCICR1 register.
Character Transmission
During an SCI transmission, data shifts out least significant bit first on the TDO pin. In this
mode, the SCIDR register consists of a buffer (TDR) between the internal bus and the
transmit shift register (see
9-bit Word length (M bit is set)
Start
Bit
8-bit Word length (M bit is reset)
Start
Bit
Bit0
Bit0
Figure
Bit1
Bit1
Data Frame
Idle Frame
Break Frame
Data Frame
Idle Frame
Break Frame
Figure
Bit2
38).
Bit2
Bit3
38).
Bit3
Bit4
Bit4
Bit5
Bit5
Bit6
Bit6
Possible
Bit7
Parity
Bit7
Bit
Possible
Parity
Bit8
Bit
Stop
Bit
Stop
Bit
Extra
Start
Next
Start
Bit
Bit
’1’
Extra
Next Data Frame
Next
Start
Start
Bit
Bit
’1’
Start
Bit
Next Data Frame
Start
Bit
ST7260xx