LVDS47/48EVK National Semiconductor, LVDS47/48EVK Datasheet - Page 15

• Manufacturer Part Number: LVDS47/48EVK
• Description: EVALUATION BOARD FOR LVDS47/48
• Manufacturer: National Semiconductor

Specifications of LVDS47/48EVK

• Main Purpose: Interface, Digital Cable Driver
• Utilized Ic / Part: DS90LV047A, DS90LV048A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: *LVDS47/48EVK; *LVDS47/48EVK/NOPB; LVDS47/48EVK/NOPB

6.0.0 LVDS Flow Through Evaluation Boards
6.1.0 The Flow Through LVDS Evaluation Board
The Flow Through LVDS Evaluation Board is used to measure LVDS signaling performance over different media.
Individual LVDS channels can be evaluated over a PCB trace, RJ45 connector and CAT5 UTP cable, or custom
transmission medium. Though LVDS quad drivers and receivers are used on the board, they can represent the standard
LVDS I/O characteristics of most of National’s LVDS devices. We can also use the DS90LV047A/048A to represent
the LVDS I/O characteristics of 3V Channel Link and 3V FPD-Link devices.
6.1.1 Purpose
The purpose of the Low Voltage Differential Signaling (LVDS) Evaluation Printed Circuit Board (PCB) is to
demonstrate the line driving capability of LVDS technology across a short PCB interconnect, and also across a variable
length of RJ45 cable. Probe points for a separate driver and a separate receiver are also provided for individual line
driver or receiver testing. The part number for the Evaluation kit is LVDS47/48EVK. In this application note, the
following differential signal nomenclature has been used: “Jx-3” represents the true signal and “Jx-1” represents the
inverting signal. On the PCB, the true signal is represented by a ‘+’ and the inverting signal is on the adjacent header pin
as shown below.
The two adjacent ground pins are there to view the true or inverting signal single-endedly. Input signals are represented
with an “I” while receiver outputs are represented with an “O.”
double row
The Flow Through LVDS Evaluation Board
header
GND
+
3
4
J5
1
2
GND
-
+
-
1
3
J6
2
4
GND
GND
GND
-
2
1
J7, J8
4
3
+
GND