LVDS47/48EVK National Semiconductor, LVDS47/48EVK Datasheet - Page 5

• Manufacturer Part Number: LVDS47/48EVK
• Description: EVALUATION BOARD FOR LVDS47/48
• Manufacturer: National Semiconductor

Specifications of LVDS47/48EVK

• Main Purpose: Interface, Digital Cable Driver
• Utilized Ic / Part: DS90LV047A, DS90LV048A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: *LVDS47/48EVK; *LVDS47/48EVK/NOPB; LVDS47/48EVK/NOPB

6.1.3 Interconnecting Cable and Connector
The evaluation PCB has been designed to directly accommodate a CAT 5 four twisted pair (8-pin) RJ45 cable. The
pinout, connector, and cable electrical/mechanical characteristics are defined in the Ethernet standard and the cable is
widely available. The connector is 8 position, with 0.10 centers and the pairs are pinned out up and down. For example
pair 1 is on pins 1 and 5, not pins 1 and 2 (see Figure 2).
IMPORTANT NOTE: The 2 unused pairs are connected to ground. Other cables may also be used if they are built up.
6.1.4 PCB Design
Due to the high speed switching rates obtainable by LVDS a minimum of a four layer PCB construction and FR-4
material is recommended. This allows for 2 signal layers and full power and ground planes. The stack is: signal
(LVDS), ground, power, signal.
Differential traces are highly recommended for the driver outputs and the receiver inputs signal (LVDS signals, refer to
PCB layout between U1 and J1). Employing differential traces will ensure a low emission design and maximum
common mode rejection of any coupled noise. Differential traces require that the spacing between the differential pair
be controlled. This distance should be held as small as possible to ensure that any noise coupled onto the lines will
primarily be common mode. Also by keeping the pair close together the maximum canceling of fields is obtained.
Differential impedance of the trace pair should be matched to the selected interconnect media (cable’s differential
characteristic impedance). Equations for calculating differential impedance are contained in National application note
AN-905 for both microstrip and stripline differential PCB traces.
For the microstrip line, the differential impedance, Z
For the new evaluation board h = 24 mils, s = 11mils and Z
Termination of LVDS lines is required to complete the current loop and for the drivers to properly operate. This
termination in its simplest form is a single surface mount resistor (surface mount resistor minimizes parasitic elements)
connected across the differential pair as close to the receiver inputs as possible (should be within 0.5 inch (13 mm) of
input pins). Its value should be selected to match the interconnects differential characteristics impedance. The closer the
match, the higher the signal fidelity and the less common mode reflections will occur (lower emissions too). A typical
value is 100 Ohms ±1%.
Z
Z
diff
diff
Figure 2: RJ45 Connector
2Z
2Z
2 (70) (0.69086) Ohms
96.72 Ohms
O
O
5 6 7 8
1 2 3 4
(1 – 0.48e
(1 – 0.48e
-0.96s/h
-0.96(11/24)
cable
) Ohms
) Ohms
diff
t
, is:
O
h
W
= 70 Ohms. Calculating the differential impedance, Z
S
r
W
diff
, is: