LM8333EVALKIT National Semiconductor, LM8333EVALKIT Datasheet - Page 12

• Manufacturer Part Number: LM8333EVALKIT
• Description: BOARD EVALUATION LM8333
• Manufacturer: National Semiconductor

Specifications of LM8333EVALKIT

• Main Purpose: Interface, Special Purpose
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: LM8333
• Primary Attributes: Mobile I/O Companion with Key-Scan, I/O Expansion, PWM, Access.bus Host
• Secondary Attributes: Board has MCU for USB to PC GUI
• Lead Free Status / RoHS Status: Not applicable / Not applicable

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10.0 Interrupts
10.1 INTERRUPT CODE
The interrupt code is read and acknowledged with the
READ_INT command (0xD0). This command clears the code
and deasserts the IRQ output.
the interrupt code.
10.2 ERROR CODE
If the LM8333 reports an error, the READ_ERROR command
(0xF0) is used to read and clear the error code.
the format of the error code.
10.3 STATUS CODES
The host can use the READ_STAT command (0xE0) to read
the status code, for example to synchronize after an error.
10.4 INTERRUPT PROCESSING
Unexpected states encountered during run-time, for example
overrun of the FIFO buffer, are reported as errors. When the
host receives an interrupt from the LM8333, it uses a
Bit
ERROR
EX_1
EX_0
KEYPAD
Bit
FIFOOVR
NOINT
KEYOVR
CMDUNK
CMDOVR
7
0
7
0
Wake Up Interrupt
Status
NoAck
Reset
Ack
FIFOOVR
6
0
6
Description
An error condition occurred.
A rising or falling edge was detected on GEN_IO_1.
A rising or falling edge was detected on GEN_IO_0.
A key-press or key-release event occurred.
Description
Key event occurred while the FIFO was full.
Interrupt deasserted before it could be serviced.
More than two keys were pressed simultaneously.
Not a valid command.
Command received before it could be accepted, e.g. after wake-up.
Table 6
5
0
5
0
shows the format of
Table 7
0000 0000
0000 0010
0000 0110
0001 0101
Code
4
0
TABLE 6. Interrupt Code
TABLE 8. Status Codes
NOINT
TABLE 7. Error Code
shows
4
12
ERROR
Default after reset.
Wake-up caused by external interrupt.
Last host command was successful.
Last host command was not successful.
3
Note that when only one of the interrupt-capable pins
GEN_IO_0 or GEN_IO_1 is configured as an interrupt input,
bits 1 and 2 are both set when an interrupt occurs. When both
GEN_IO_0 and GEN_IO_1 pins are configured as interrupt
inputs, only one bit corresponding to the interrupt source is
set when an interrupt occurs.
READ_INT command to read the interrupt code. If the code
has a set ERROR bit, the host then uses a READ_ERROR
command to read the error code, as shown in
3
0
EX_1
KEYOVR
2
2
Description
EX_0
CMDUNK
1
1
Figure
KEYPAD
CMDOVR
0
11.
0