ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 23

• Manufacturer Part Number: ADC1415S125/DB,598
• Description: BOARD DEMO FOR ADC1415S125
• Manufacturer: NXP Semiconductors
• Type: A/Dr

Specifications of ADC1415S125/DB,598

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Inputs Per Adc: 1 Differential
• Input Range: 1 ~ 2 Vpp
• Power (typ) @ Conditions: 840mW @ 125Msps
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC1415S125
• Product: Data Conversion Development Tools
• Conversion Rate: 125 MSPS
• Resolution: 14 bit
• Interface Type: SMA
• For Use With/related Products: ADC1415S125
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5094

NXP Semiconductors
ADC1415S_SER
Product data sheet
11.4.1 Drive modes
11.4 Clock input
The ADC1415S can be driven differentially (LVPECL). It can also be driven by a
single-ended Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS) signal
connected to pin CLKP (pin CLKM should be connected to ground via a capacitor) or
CLKM (pin CLKP should be connected to ground via a capacitor).
Fig 22. LVCMOS single-ended clock input
Fig 23. Differential clock input
a. Rising edge LVCMOS
a. Sine clock input
c. LVPECL clock input
clock input
clock input
LVCMOS
Sine
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
Rev. 4 — 17 December 2010
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CLKM
CLKP
CLKM
CLKP
clock input
LVPECL
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CLKM
CLKP
clock input
b. Falling edge LVCMOS
b. Sine clock input (with transformer)
ADC1415S series
Sine
clock input
LVCMOS
© NXP B.V. 2010. All rights reserved.
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CLKM
CLKP
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CLKM
CLKP
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